Covered Source-Channel Tunnel Field-Effect Transistors With Trench Gate Structures

We propose a new design for covered source-channel tunnel field-effect transistors (CSC-TFETs) with trench gate structures. The I-V characteristics, on/off current ratio, subthreshold swing, and band-to-band tunneling rate are analyzed using a commercial device simulator. Our proposed CSC-TFETs exhi...

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Bibliographic Details
Published in:IEEE transactions on nanotechnology 2019, Vol.18, p.114-118
Main Authors: Woo, Sola, Kim, Sangsig
Format: Article
Language:English
Subjects:
covered source–channel TFET
Current ratio
Field effect transistors
Integrated circuit modeling
Logic gates
Semiconductor devices
Silicon
SPICE
SPICE model
TCAD simulation
TFETs
Transistors
trench gate
Tunnel field-effect transistors
Tunneling
Tunnels
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Summary:We propose a new design for covered source-channel tunnel field-effect transistors (CSC-TFETs) with trench gate structures. The I-V characteristics, on/off current ratio, subthreshold swing, and band-to-band tunneling rate are analyzed using a commercial device simulator. Our proposed CSC-TFETs exhibit an on/off current ratio of approximately 10 10 , an on-current of approximately 10 -5 A/μm at room temperature, and a subthreshold swing of less than 40 mV/decade. In addition, the on-current of the CSC-TFETs is ~233 times that of conventional TFETs, demonstrating that the switching characteristics are superior to those of other silicon-based TFETs. Moreover, a CSC-TFET inverter is characterized by SPICE calibration and provides a high frequency of approximately 1 GHz at a supply voltage of 1.0 V.
ISSN:1536-125X
1941-0085
DOI:10.1109/TNANO.2018.2882859