New Insights Into the Single Event Transient Propagation Through Static and TSPC Logic

An investigation of the Single Event Transient (SET) characteristics (amplitude and width) variation while propagating through static and True Single Phase Clock (TSPC) logic is presented. The dependencies of the SET characteristics on the input patterns, propagation paths, pulse polarity, diverging...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2014-08, Vol.61 (4), p.1618-1627
Main Authors: Hamad, Ghaith Bany, Hasan, Syed Rafay, Mohamed, Otmane Ait, Savaria, Yvon
Format: Article
Language:English
Subjects:
Amplitudes
Attenuation
Broadening
byzantine faults
Clocks
CMOS integrated circuits
diverging paths
Faults
input pattern
Logic
Logic gates
Polarity
Propagation
propagation induced pulse broadening (PIPB)
propagation path
Pulse generation
re-converging paths
Semiconductor device modeling
single event transient (SET)
Single event transients
soft errors
Transistors
True Single Phase Clocked (TSPC)
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Summary:An investigation of the Single Event Transient (SET) characteristics (amplitude and width) variation while propagating through static and True Single Phase Clock (TSPC) logic is presented. The dependencies of the SET characteristics on the input patterns, propagation paths, pulse polarity, diverging paths, and re-converging paths are investigated. New insights on the propagation induced pulse broadening (PIPB) phenomenon in different combinations of static and TSPC logic are reported. The worst and the best propagation paths for SET pulse broadening and attenuation are identified. Our results demonstrate that SET pulses propagation can lead to Byzantine faults as they propagate through diverging paths. A new way to abstract all possible interpretations of the SET induced Byzantine fault phenomenon is proposed.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2014.2305434