Simple Interpolated FFT Algorithm Based on Minimize Sidelobe Windows for Power-Harmonic Analysis

This paper focuses on the low-computation harmonic-analysis procedure with sufficient suppression of spectral leakage and picket-fence effect. The interpolated FFT algorithm based on the minimized sidelobe window is considered, and its calculate procedure and formulas are given, which is free of sol...

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Bibliographic Details
Published in:IEEE transactions on power electronics 2011-09, Vol.26 (9), p.2570-2579
Main Authors: Wen, He, Teng, Zhaosheng, Wang, Yong, Zeng, Bo, Hu, Xiaoguang
Format: Article
Language:English
Subjects:
Accuracy
Algorithm design and analysis
Algorithms
Applied sciences
Approximation algorithms
Circuit properties
Design. Technologies. Operation analysis. Testing
Digital circuits
Digital signal processor (DSP)
Digital signal processors
Discrete Fourier transforms
Electric, optical and optoelectronic circuits
Electrical engineering. Electrical power engineering
Electrical power engineering
Electronic circuits
Electronics
Exact sciences and technology
Harmonic analysis
Integrated circuits
Integrated circuits by function (including memories and processors)
interpolated FFT
Interpolation
minimize sidelobe windows (MSWs)
picket-fence effect
Power networks and lines
Power system harmonics
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal processing algorithms
Simulation
spectral leakage
Theory. Simulation
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Summary:This paper focuses on the low-computation harmonic-analysis procedure with sufficient suppression of spectral leakage and picket-fence effect. The interpolated FFT algorithm based on the minimized sidelobe window is considered, and its calculate procedure and formulas are given, which is free of solving high-order equations. The implementation of the proposed algorithm in the digital-signal-processor (DSP) based three-phase harmonic ammeter is also introduced. The proposed algorithm has the major advantages that the calculate formulas for harmonic parameters can be easily implemented by hardware multipliers, making the method a good choice for real-time applications. The simulation and application results validate the accuracy and efficiency of the proposed algorithm.
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2011.2111388