A Class-E Power Amplifier Design Considering MOSFET Nonlinear Drain-to-Source and Nonlinear Gate-to-Drain Capacitances at Any Grading Coefficient

• Published in: IEEE transactions on power electronics 2016-11, Vol.31 (11), p.7770-7779
• Main Authors: Hayati, Mohsen, Roshani, Sobhan, Kazimierczuk, Marian K., Sekiya, Hiroo
• Format: Article
• Language: English
• Subjects: Capacitance; Class E power amplifier; CMOS; Coefficients; Electric potential; Electrical design; Energy efficiency; Grading; Logic gates; MOSFET; MOSFET parasitic capacitances; MOSFETs; nonlinear drain-to-source capacitance; nonlinear gate-to-drain capacitance; Nonlinearity; Parasitic capacitance; Power amplifiers; Receivers & amplifiers; Simulation; Switches; Switching; Voltage; Waveform analysis; Zero voltage switching; ZVS and ZDS conditions
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2015.2512928

This paper presents theory and analysis for class-E power amplifier considering MOSFET nonlinear gate-to-drain and nonlinear drain-to-source capacitances at any grading coefficient of the MOSFET body junction diode. The nonlinearity degree of a MOSFET parasitic capacitance is determined by the grading coefficient. When the grading coefficient is not considered in design procedure, the switch voltage waveform of the class-E power amplifier does not satisfy the switching conditions, which results in a decrease of the power conversion efficiency. Therefore, the grading coefficient is an important parameter to satisfy the class-E zero-voltage switching (ZVS) and zero-derivative switching (ZDS) conditions. The MOSFET gate-to-drain capacitance is highly nonlinear, and it is more nonlinear than drain-to-source capacitance for most MOSFETs. In some cases, the change in the gate-to-drain capacitance can be as large as 100 times. The results show that this nonlinearity affects the class-E power amplifier properties, such as switch voltage, power output capability, and maximum switch voltage. Therefore, it is necessary to consider the nonlinearity of the gate-to-drain capacitance, along with the drain-to-source capacitance. A design example at 4 MHz operating frequency is also given to describe the design procedure. The ZVS and ZDS conditions are achieved in the obtained switch voltage. The circuit simulation was performed using PSpice software. For verification of the presented theory, a class-E power amplifier is fabricated. The measured results are verified with simulation and theory results.