CPU/FPGA-Based Real-Time Simulation of a Two-Terminal MMC-HVDC System

This paper presents a methodology for the central-processing unit/field-programmable gate-array (FPGA)-based real-time simulation of a two-terminal MMC-HVDC of up to 501 levels using a detailed equivalent model. The proposed modeling approach is validated using case studies of 101-level and 501-leve...

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Bibliographic Details
Published in:IEEE transactions on power delivery 2017-04, Vol.32 (2), p.647-655
Main Authors: Ould-Bachir, Tarek, Saad, Hani, Dennetiere, Sebastien, Mahseredjian, Jean
Format: Article
Language:English
Subjects:
Capacitors
Computational modeling
Field programmable gate arrays
Field-programmable gate array (FPGA)
HVDC
Integrated circuit modeling
Logic gates
modular multilevel converter (MMC)
real-time simulation
Real-time systems
Topology
voltage-source converter (VSC)
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Summary:This paper presents a methodology for the central-processing unit/field-programmable gate-array (FPGA)-based real-time simulation of a two-terminal MMC-HVDC of up to 501 levels using a detailed equivalent model. The proposed modeling approach is validated using case studies of 101-level and 501-level multilevel modular converter setups. FPGA-based models are designed using low-latency custom-made floating-point operators. The FPGA model is entirely reconfigurable in terms of the number of submodules per arm, as well as circuit parameters on an individual submodule basis. Real-time simulation performance is demonstrated in single-rate and multirate simulation environments and under various operating conditions. Limitations to the detailed equivalent model are identified and discussed.
ISSN:0885-8977
1937-4208
DOI:10.1109/TPWRD.2015.2508381