Collaborative Cloud and Edge Mobile Computing in C-RAN Systems With Minimal End-to-End Latency

• Published in: IEEE transactions on signal and information processing over networks 2021, Vol.7, p.259-274
• Main Authors: Park, Seok-Hwan, Jeong, Seongah, Na, Jinyeop, Simeone, Osvaldo, Shamai, Shlomo
• Format: Article
• Language: English
• Subjects: (matrix) fractional programming; C-RAN; Cloud computing; Collaboration; Computation offloading; Computer architecture; constrained fronthaul; Downlink; Edge computing; Electronic devices; end-to-end latency minimization; Mathematical programming; Microprocessors; Mobile cloud computing; Mobile computing; Network latency; Optimization; Servers; Task analysis; Uplink; Wireless communications
• ISSN: 2373-776X; 2373-776X; 2373-7778
• DOI: 10.1109/TSIPN.2021.3070712

Mobile cloud and edge computing protocols make it possible to offer computationally heavy applications to mobile devices via computational offloading from devices to nearby edge servers or more powerful, but remote, cloud servers. Previous work assumed that computational tasks can be fractionally offloaded at both cloud processor (CP) and at a local edge node (EN) within a conventional Distributed Radio Access Network (D-RAN) that relies on non-cooperative ENs equipped with one-way uplink fronthaul connection to the cloud. In this paper, we propose to integrate collaborative fractional computing across CP and ENs within a Cloud RAN (C-RAN) architecture with finite-capacity two-way fronthaul links. Accordingly, tasks offloaded by a mobile device can be partially carried out at an EN and the CP, with multiple ENs communicating with a common CP to exchange data and computational outcomes while allowing for centralized precoding and decoding. Unlike prior work, we investigate joint optimization of computing and communication resources, including wireless and fronthaul segments, to minimize the end-to-end latency by accounting for a two-way uplink and downlink transmission. The problem is tackled by using fractional programming (FP) and matrix FP. Extensive numerical results validate the performance gain of the proposed architecture as compared to the previously studied D-RAN solution.