Relaxed K -Best MIMO Signal Detector Design and VLSI Implementation

Signal detector is a key element in a multiple-input multiple-output (MIMO) wireless communication receiver. It has been well demonstrated that nonlinear tree search MIMO detectors can achieve near-optimum detection performance, nevertheless their efficient high-speed VLSI implementations are not tr...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2007-03, Vol.15 (3), p.328-337
Main Authors: Chen, Sizhong, Zhang, Tong, Xin, Yan
Format: Article
Language:English
Subjects:
Applied sciences
Design. Technologies. Operation analysis. Testing
Detection
Detection algorithms
Detectors
Electronics
Exact sciences and technology
General equipment and techniques
Hardware
Instruments, apparatus, components and techniques common to several branches of physics and astronomy
Integrated circuits
Libraries
Magnetic and optical mass memories
maximum likelihood (ML)
MIMO
multiple-input multiple-output (MIMO) systems
Physics
Quadrature amplitude modulation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Sensors (chemical, optical, electrical, movement, gas, etc.)
remote sensing
Signal design
Signal detection
spatial multiplexing
Storage and reproduction of information
Very large scale integration
VLSI
Wireless communication
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Summary:Signal detector is a key element in a multiple-input multiple-output (MIMO) wireless communication receiver. It has been well demonstrated that nonlinear tree search MIMO detectors can achieve near-optimum detection performance, nevertheless their efficient high-speed VLSI implementations are not trivial. For example, the hardware design of hard- or soft- output detectors for a 4 times 4 MIMO system with 64 quadrature amplitude modulation (QAM) still remains missing in the open literature. As an attempt to tackle this challenge, this paper presents an implementation-oriented breadth-first tree search MIMO detector design solution. The key is to appropriately modify the conventional breadth-first tree search detection algorithm in order to largely improve the suitability for efficient hardware implementation, while maintaining good detection performance. To demonstrate the effectiveness of the proposed design solution, using 0.13-mum CMOS standard cell and memory libraries, we designed a soft-output signal detector for 4 times 4 MIMO with 64-QAM. With the silicon area of about 31 mm 2 , the detector can achieve above 100 Mb/s and realize the performance very close to that of the sphere decoding algorithm
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2007.893621