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ABRM: Adaptive \beta-Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling
Subthreshold operation of digital circuits has emerged as a promising approach to achieve ultralow power dissipation. However, extensive application of subthreshold logic is limited due to low performance and high susceptibility to process variation (PV). This paper proposes a PV-tolerant ultradynam...
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Published in: | IEEE transactions on very large scale integration (VLSI) systems 2010-02, Vol.18 (2), p.281-290 |
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creator | Myeong-Eun Hwang Roy, K. |
description | Subthreshold operation of digital circuits has emerged as a promising approach to achieve ultralow power dissipation. However, extensive application of subthreshold logic is limited due to low performance and high susceptibility to process variation (PV). This paper proposes a PV-tolerant ultradynamic voltage scaling (UDVS) system where performance requirements dictate whether the devices will work in the subthreshold or superthreshold region. Due to different mechanisms of current conduction, it is necessary to use different P/N ratios for different regions of operation to improve circuit robustness, performance, and power. With an analytical model of circuit robustness, we present an adaptive body-biasing technique to dynamically adjust the ß-ratio depending on the operating region. Measurements show that our methodology improves the dynamic range of operation the circuits-from 1.2 V all the way down to 85 mV consuming 40 nW (at 85 mV) of power for an 8 × 8 finite-impulse response filter fabricated in a 0.13-¿m technology, and can salvage circuits which otherwise would fail to operate due to device mismatches and skewed P/N ratios. |
doi_str_mv | 10.1109/TVLSI.2008.2010767 |
format | article |
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Measurements show that our methodology improves the dynamic range of operation the circuits-from 1.2 V all the way down to 85 mV consuming 40 nW (at 85 mV) of power for an 8 × 8 finite-impulse response filter fabricated in a 0.13-¿m technology, and can salvage circuits which otherwise would fail to operate due to device mismatches and skewed P/N ratios.</description><identifier>ISSN: 1063-8210</identifier><identifier>EISSN: 1557-9999</identifier><identifier>DOI: 10.1109/TVLSI.2008.2010767</identifier><identifier>CODEN: IEVSE9</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; beta -ratio ; Circuit properties ; Circuits ; CMOS logic circuits ; Devices ; Digital circuits ; Dynamic voltage scaling (DVS) ; Electric potential ; Electric, optical and optoelectronic circuits ; Electronic circuits ; Electronics ; Exact sciences and technology ; Frequency filters ; Logic ; Logic circuits ; Logic design ; Logic devices ; low power ; P/N ratio ; Power dissipation ; process variation (PV) ; Robustness ; Subthreshold current ; subthreshold logic ; Threshold voltage ; Timing ; Very large scale integration ; Voltage ; Voltage control</subject><ispartof>IEEE transactions on very large scale integration (VLSI) systems, 2010-02, Vol.18 (2), p.281-290</ispartof><rights>2015 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c395t-34f2735d03ca99aea2f331c9dd8f06403c3431e9bad716ecd6bb7a8e34d526243</citedby><cites>FETCH-LOGICAL-c395t-34f2735d03ca99aea2f331c9dd8f06403c3431e9bad716ecd6bb7a8e34d526243</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4814475$$EHTML$$P50$$Gieee$$H</linktohtml><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=22338397$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Myeong-Eun Hwang</creatorcontrib><creatorcontrib>Roy, K.</creatorcontrib><title>ABRM: Adaptive \beta-Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling</title><title>IEEE transactions on very large scale integration (VLSI) systems</title><addtitle>TVLSI</addtitle><description>Subthreshold operation of digital circuits has emerged as a promising approach to achieve ultralow power dissipation. However, extensive application of subthreshold logic is limited due to low performance and high susceptibility to process variation (PV). This paper proposes a PV-tolerant ultradynamic voltage scaling (UDVS) system where performance requirements dictate whether the devices will work in the subthreshold or superthreshold region. Due to different mechanisms of current conduction, it is necessary to use different P/N ratios for different regions of operation to improve circuit robustness, performance, and power. With an analytical model of circuit robustness, we present an adaptive body-biasing technique to dynamically adjust the ß-ratio depending on the operating region. Measurements show that our methodology improves the dynamic range of operation the circuits-from 1.2 V all the way down to 85 mV consuming 40 nW (at 85 mV) of power for an 8 × 8 finite-impulse response filter fabricated in a 0.13-¿m technology, and can salvage circuits which otherwise would fail to operate due to device mismatches and skewed P/N ratios.</description><subject>Applied sciences</subject><subject>beta -ratio</subject><subject>Circuit properties</subject><subject>Circuits</subject><subject>CMOS logic circuits</subject><subject>Devices</subject><subject>Digital circuits</subject><subject>Dynamic voltage scaling (DVS)</subject><subject>Electric potential</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Frequency filters</subject><subject>Logic</subject><subject>Logic circuits</subject><subject>Logic design</subject><subject>Logic devices</subject><subject>low power</subject><subject>P/N ratio</subject><subject>Power dissipation</subject><subject>process variation (PV)</subject><subject>Robustness</subject><subject>Subthreshold current</subject><subject>subthreshold logic</subject><subject>Threshold voltage</subject><subject>Timing</subject><subject>Very large scale integration</subject><subject>Voltage</subject><subject>Voltage control</subject><issn>1063-8210</issn><issn>1557-9999</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><recordid>eNo9kEtPwzAMxysEEmPwBeDSC-LUkUdf4TYmHpM2gfbiglS5iYuKsmYkHdK-PSmb5oNt2X9b9i8IrikZUErE_WI1mY8HjJDcO0qyNDsJejRJskh4O_U5SXmUM0rOgwvnvgmhcSxIL_gYPs6mD-FQwaatfzH8LLGFaAZtbcKpUVvdZU1YGRu-WyPRuWhhNFpo2nCpWwtq18C6luHK6Ba-MJxL0HXzdRmcVaAdXh1iP1g-Py1Gr9Hk7WU8Gk4iyUXSRjyuWMYTRbgEIQCBVZxTKZTKK5LGvsxjTlGUoDKaolRpWWaQI49VwlIW835wt9-7seZni64t1rWTqDU0aLauyBKesUSknZLtldIa5yxWxcbWa7C7gpKig1j8Qyw6iMUBoh-6PawH5x-r_N-ydsdJxjjPueh0N3tdjYjHdpx7yv6CP1-RewY</recordid><startdate>20100201</startdate><enddate>20100201</enddate><creator>Myeong-Eun Hwang</creator><creator>Roy, K.</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>F28</scope><scope>FR3</scope><scope>L7M</scope></search><sort><creationdate>20100201</creationdate><title>ABRM: Adaptive \beta-Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling</title><author>Myeong-Eun Hwang ; Roy, K.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c395t-34f2735d03ca99aea2f331c9dd8f06403c3431e9bad716ecd6bb7a8e34d526243</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Applied sciences</topic><topic>beta -ratio</topic><topic>Circuit properties</topic><topic>Circuits</topic><topic>CMOS logic circuits</topic><topic>Devices</topic><topic>Digital circuits</topic><topic>Dynamic voltage scaling (DVS)</topic><topic>Electric potential</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Frequency filters</topic><topic>Logic</topic><topic>Logic circuits</topic><topic>Logic design</topic><topic>Logic devices</topic><topic>low power</topic><topic>P/N ratio</topic><topic>Power dissipation</topic><topic>process variation (PV)</topic><topic>Robustness</topic><topic>Subthreshold current</topic><topic>subthreshold logic</topic><topic>Threshold voltage</topic><topic>Timing</topic><topic>Very large scale integration</topic><topic>Voltage</topic><topic>Voltage control</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Myeong-Eun Hwang</creatorcontrib><creatorcontrib>Roy, K.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Myeong-Eun Hwang</au><au>Roy, K.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>ABRM: Adaptive \beta-Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling</atitle><jtitle>IEEE transactions on very large scale integration (VLSI) systems</jtitle><stitle>TVLSI</stitle><date>2010-02-01</date><risdate>2010</risdate><volume>18</volume><issue>2</issue><spage>281</spage><epage>290</epage><pages>281-290</pages><issn>1063-8210</issn><eissn>1557-9999</eissn><coden>IEVSE9</coden><abstract>Subthreshold operation of digital circuits has emerged as a promising approach to achieve ultralow power dissipation. However, extensive application of subthreshold logic is limited due to low performance and high susceptibility to process variation (PV). This paper proposes a PV-tolerant ultradynamic voltage scaling (UDVS) system where performance requirements dictate whether the devices will work in the subthreshold or superthreshold region. Due to different mechanisms of current conduction, it is necessary to use different P/N ratios for different regions of operation to improve circuit robustness, performance, and power. With an analytical model of circuit robustness, we present an adaptive body-biasing technique to dynamically adjust the ß-ratio depending on the operating region. Measurements show that our methodology improves the dynamic range of operation the circuits-from 1.2 V all the way down to 85 mV consuming 40 nW (at 85 mV) of power for an 8 × 8 finite-impulse response filter fabricated in a 0.13-¿m technology, and can salvage circuits which otherwise would fail to operate due to device mismatches and skewed P/N ratios.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TVLSI.2008.2010767</doi><tpages>10</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Journals |
subjects | Applied sciences beta -ratio Circuit properties Circuits CMOS logic circuits Devices Digital circuits Dynamic voltage scaling (DVS) Electric potential Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology Frequency filters Logic Logic circuits Logic design Logic devices low power P/N ratio Power dissipation process variation (PV) Robustness Subthreshold current subthreshold logic Threshold voltage Timing Very large scale integration Voltage Voltage control |
title | ABRM: Adaptive \beta-Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling |
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