Systolic Gaussian Normal Basis Multiplier Architectures Suitable for High-Performance Applications

Normal basis multiplication in finite fields is vastly utilized in different applications, including error control coding and the like due to its advantageous characteristics and the fact that squaring of elements can be obtained without hardware complexity. In this brief, we present decomposition a...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2015-09, Vol.23 (9), p.1969-1972
Main Authors: Azarderakhsh, Reza, Kermani, Mehran Mozaffari, Bayat-Sarmadi, Siavash, Chiou-Yng Lee
Format: Article
Language:English
Subjects:
Application specific integrated circuits
Clocks
Complexity theory
Computer architecture
Cryptography
Gaussian normal basis (GNB)
Gaussian processes
Hardware
security
systolic architecture
Very large scale integration
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Summary:Normal basis multiplication in finite fields is vastly utilized in different applications, including error control coding and the like due to its advantageous characteristics and the fact that squaring of elements can be obtained without hardware complexity. In this brief, we present decomposition algorithms to develop novel systolic structures for digit-level Gaussian normal basis multiplication over GF(2 m ). The proposed architectures are suitable for high-performance applications, which require fast computations in finite fields with high throughputs. We also present the results of our application-specific integrated circuit synthesis using a 65-nm standard-cell library to benchmark the effectiveness of the proposed systolic architectures. The presented architectures for multiplication can result in more efficient and high-performance VLSI systems.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2014.2345774