A Quadrature Clock Corrector for DRAM Interfaces, With a Duty-Cycle and Quadrature Phase Detector Based on a Relaxation Oscillator

A quadrature clock corrector uses relaxation oscillators to detect duty-cycle and quadrature phase errors by transforming them into pairs of frequencies, which are then digitized and compared. It achieves good detection accuracy and can detect a wide range of duty-cycle and quadrature phase errors....

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 2019-04, Vol.27 (4), p.978-982
Main Authors: Chae, Joo-Hyung, Ko, Hyeongjun, Park, Jihwan, Kim, Suhwan
Format: Article
Language:English
Subjects:
Capacitors
Clocks
CMOS
Detectors
Digitization
duty cycle
Dynamic random access memory
Dynamic random access memory (DRAM) interface
Frequency conversion
Oscillators
Phase detectors
Phase error
Phase frequency detector
Phase transitions
Power efficiency
quadrature clock corrector
quadrature phase
Random access memory
relaxation oscillator
Relaxation oscillators
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Description
Summary:A quadrature clock corrector uses relaxation oscillators to detect duty-cycle and quadrature phase errors by transforming them into pairs of frequencies, which are then digitized and compared. It achieves good detection accuracy and can detect a wide range of duty-cycle and quadrature phase errors. The prototype is implemented in a 55-nm CMOS process with a supply voltage of 1.2 V and occupies an area of 0.003 mm 2 . The experimental results show that the operation range is from 1 to 3 GHz, the power efficiency is 0.79 mW/GHz, the maximum duty-cycle error is 0.8% at 3 GHz, and the maximum quadrature phase error is 1.1° at 3 GHz.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2018.2883730