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A source coupled FET logic-A new current-mode approach to GaAs logics
This paper describes the basic properties of the source coupled FET logic (SCFL) in terms of the dc characteristics, the speed and power performance, and other inherent features. Simulation results are compared to those for the direct coupled FET logic (DCFL), demonstrating that the SCFL has a wide...
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Published in: | IEEE transactions on electron devices 1985-06, Vol.32 (6), p.1114-1118 |
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Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that cite this one |
Online Access: | Get full text |
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Summary: | This paper describes the basic properties of the source coupled FET logic (SCFL) in terms of the dc characteristics, the speed and power performance, and other inherent features. Simulation results are compared to those for the direct coupled FET logic (DCFL), demonstrating that the SCFL has a wide allowable threshold voltage range, an excellent fan-out capability, a small input capacitance, a high input sensitivity, and a versatility for the application. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/T-ED.1985.22082 |