Effects of polysilicon electron cyclotron resonance etching on electrical characteristics of gate oxides

• Published in: Japanese Journal of Applied Physics 1995-05, Vol.34 (5A), p.2272-2277
• Main Authors: Kang, Tzong-Kuei, Ueng, Shih-Yuan, Dai, Bau-Tong, Chen, Liang-Po, Huang-Chung Cheng, Huang-Chung Cheng
• Format: Article
• Language: English
• Subjects: Applied sciences; Electronics; Exact sciences and technology; Microelectronic fabrication (materials and surfaces technology); Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/JJAP.34.2272

In spite of the small amount of damage induced by Electron Cyclotron Resonance (ECR) etching, the radiation damage due to vacuum ultraviolet (VUV) photons from the high-density plasma still causes several problems. The leakage currents of the metal-oxide-semiconductor (MOS) capacitors with ECR-etched polysilicon gates are found to be higher than those of the control with wet etching. The leakage mechanism is therefore investigated in detail. The ions and radicals of the ECR plasma can directly attack the peripheral gate oxide and form the surface-damaged layer. In addition, the VUV photons will deeply impact the oxide interior and induce positive charges and interface trap states. A dilute HF solution can effectively remove the surface damage layer. Annealing at 400° C for 30 min can eliminate completely the positive charges. Furthermore, the SiO 2 /Si interface trap states are completely removed as the annealing time is raised to 60 min.