An analytical fully-depleted silicon-on-insulator metal-oxide-semiconductor field-effect-transistor model considering the effects of self-heating, source/drain resistance, impact-ionization, and parasitic bipolar junction transistor

• Published in: Japanese Journal of Applied Physics 1997-05, Vol.36 (5A), p.2606-2613
• Main Authors: HU, M.-C, JANG, S.-L, CHEN, Y.-S, LIU, S.-S, LIN, J.-M
• Format: Article
• Language: English
• Subjects: Applied sciences; Electronics; Exact sciences and technology; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/JJAP.36.2606

This paper presents a simple, complete, and analytical drain current model for submicrometer silicon-on-insulator metal-oxide-semiconductor field-effect-transistor (SOI MOSFET). The model applicable for digital/analog circuit simulation contains the following advanced features: precise description of the subthreshold, near threshold, and above-threshold regions of operation by one single expression; precise description of I – V and G – V characteristics in the saturation region; single-piece drain current equation smoothly continuous from the linear region to saturation region; considering the source/drain resistance; inclusion of important short channel effects such as velocity saturation, drain induced barrier lowering and channel length modulation; self-heating effect due to the low thermal conductivity of the buried oxide; impact-ionization of MOS devices and the parasitic bipolar junction transistor (BJT) effect associated with drain breakdown. The model predicts that the parasitic resistances are important for submicron and deep submicron SOI MOS devices, the effects of impact-ionization and parasitic BJT are important in saturation region at small gate source voltage V GF , and self-heating effect is important in saturation region at large V GF . The present model agrees well with experimental results of various dimensions.