Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure

The sidewall film in low-$k$/copper interconnects is generally applied to protect the etched low-$k$ surface. However, the existence of this film will become a critical issue with shrinking device sizes. In this work, using intermetal low-$k$ film consisting of scalable porous silica ($k = 2.1$), we...

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Published in:Japanese Journal of Applied Physics 2010-05, Vol.49 (5), p.05FD02-05FD02-8
Main Authors: Gawase, Akifumi, Chikaki, Shinichi, Nakamura, Naofumi, Soda, Eiichi, Oda, Noriaki, Saito, Shuichi
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cited_by cdi_FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13
cites cdi_FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13
container_end_page 05FD02-8
container_issue 5
container_start_page 05FD02
container_title Japanese Journal of Applied Physics
container_volume 49
creator Gawase, Akifumi
Chikaki, Shinichi
Nakamura, Naofumi
Soda, Eiichi
Oda, Noriaki
Saito, Shuichi
description The sidewall film in low-$k$/copper interconnects is generally applied to protect the etched low-$k$ surface. However, the existence of this film will become a critical issue with shrinking device sizes. In this work, using intermetal low-$k$ film consisting of scalable porous silica ($k = 2.1$), we tried to eliminate the sidewall film by reducing pore size in 140-nm-pitched scalable porous silica/copper interconnects. Sufficient wiring resistance yield and low wiring capacitance were obtained even in the structure without sidewall. The degradation in the line-to-line leakage caused by the upper layer fabrication process was improved by this sidewall elimination. The mechanism of the leakage degradation was explained by the moisture diffusion from the upper layer, which reacted with the damage site generated by the sidewall formation process.
doi_str_mv 10.1143/JJAP.49.05FD02
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fullrecord <record><control><sourceid>ipap_cross</sourceid><recordid>TN_cdi_crossref_primary_10_1143_JJAP_49_05FD02</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>10_1143_JJAP_49_05FD02</sourcerecordid><originalsourceid>FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13</originalsourceid><addsrcrecordid>eNqFkD1PwzAURS0EEqWwMnvoAEhJ_ZW0Hhiq0EKrSFRqmSPHfQbT1KkcR4iRf06isjPd96R77nAQuqUkplTw8Wo1W8dCxiRZPBF2hgaUi0kkSJqcowEhjEZCMnaJrprms3vTRNAB-tl6cPoDb-wOvlRV4XllD9apYGuH58aADri7cusgCnXUJ85B7dU74Kz1HRywdXijVaXKCvC69nXbdHOV1QrfjfaPmMV0dD_OWrx0AbyunetHN8G3OrQertGFUVUDN385RG-L-TZ7ifLX52U2yyPNBQkRBWWkkKZkYMiUAkm0LKU2MCVsSrkGrQjjyYQSkdKd4ZKKCSsTRRkv06mifIji0672ddN4MMXR24Py3wUlRS-w6AUWQhYngR3wcALsUR3_K_8CGFZwGA</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure</title><source>Institute of Physics IOPscience extra</source><source>Institute of Physics:Jisc Collections:IOP Publishing Read and Publish 2024-2025 (Reading List)</source><creator>Gawase, Akifumi ; Chikaki, Shinichi ; Nakamura, Naofumi ; Soda, Eiichi ; Oda, Noriaki ; Saito, Shuichi</creator><creatorcontrib>Gawase, Akifumi ; Chikaki, Shinichi ; Nakamura, Naofumi ; Soda, Eiichi ; Oda, Noriaki ; Saito, Shuichi</creatorcontrib><description>The sidewall film in low-$k$/copper interconnects is generally applied to protect the etched low-$k$ surface. However, the existence of this film will become a critical issue with shrinking device sizes. In this work, using intermetal low-$k$ film consisting of scalable porous silica ($k = 2.1$), we tried to eliminate the sidewall film by reducing pore size in 140-nm-pitched scalable porous silica/copper interconnects. Sufficient wiring resistance yield and low wiring capacitance were obtained even in the structure without sidewall. The degradation in the line-to-line leakage caused by the upper layer fabrication process was improved by this sidewall elimination. The mechanism of the leakage degradation was explained by the moisture diffusion from the upper layer, which reacted with the damage site generated by the sidewall formation process.</description><identifier>ISSN: 0021-4922</identifier><identifier>EISSN: 1347-4065</identifier><identifier>DOI: 10.1143/JJAP.49.05FD02</identifier><language>eng</language><publisher>The Japan Society of Applied Physics</publisher><ispartof>Japanese Journal of Applied Physics, 2010-05, Vol.49 (5), p.05FD02-05FD02-8</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13</citedby><cites>FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Gawase, Akifumi</creatorcontrib><creatorcontrib>Chikaki, Shinichi</creatorcontrib><creatorcontrib>Nakamura, Naofumi</creatorcontrib><creatorcontrib>Soda, Eiichi</creatorcontrib><creatorcontrib>Oda, Noriaki</creatorcontrib><creatorcontrib>Saito, Shuichi</creatorcontrib><title>Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure</title><title>Japanese Journal of Applied Physics</title><description>The sidewall film in low-$k$/copper interconnects is generally applied to protect the etched low-$k$ surface. However, the existence of this film will become a critical issue with shrinking device sizes. In this work, using intermetal low-$k$ film consisting of scalable porous silica ($k = 2.1$), we tried to eliminate the sidewall film by reducing pore size in 140-nm-pitched scalable porous silica/copper interconnects. Sufficient wiring resistance yield and low wiring capacitance were obtained even in the structure without sidewall. The degradation in the line-to-line leakage caused by the upper layer fabrication process was improved by this sidewall elimination. The mechanism of the leakage degradation was explained by the moisture diffusion from the upper layer, which reacted with the damage site generated by the sidewall formation process.</description><issn>0021-4922</issn><issn>1347-4065</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><recordid>eNqFkD1PwzAURS0EEqWwMnvoAEhJ_ZW0Hhiq0EKrSFRqmSPHfQbT1KkcR4iRf06isjPd96R77nAQuqUkplTw8Wo1W8dCxiRZPBF2hgaUi0kkSJqcowEhjEZCMnaJrprms3vTRNAB-tl6cPoDb-wOvlRV4XllD9apYGuH58aADri7cusgCnXUJ85B7dU74Kz1HRywdXijVaXKCvC69nXbdHOV1QrfjfaPmMV0dD_OWrx0AbyunetHN8G3OrQertGFUVUDN385RG-L-TZ7ifLX52U2yyPNBQkRBWWkkKZkYMiUAkm0LKU2MCVsSrkGrQjjyYQSkdKd4ZKKCSsTRRkv06mifIji0672ddN4MMXR24Py3wUlRS-w6AUWQhYngR3wcALsUR3_K_8CGFZwGA</recordid><startdate>20100501</startdate><enddate>20100501</enddate><creator>Gawase, Akifumi</creator><creator>Chikaki, Shinichi</creator><creator>Nakamura, Naofumi</creator><creator>Soda, Eiichi</creator><creator>Oda, Noriaki</creator><creator>Saito, Shuichi</creator><general>The Japan Society of Applied Physics</general><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>20100501</creationdate><title>Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure</title><author>Gawase, Akifumi ; Chikaki, Shinichi ; Nakamura, Naofumi ; Soda, Eiichi ; Oda, Noriaki ; Saito, Shuichi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2010</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Gawase, Akifumi</creatorcontrib><creatorcontrib>Chikaki, Shinichi</creatorcontrib><creatorcontrib>Nakamura, Naofumi</creatorcontrib><creatorcontrib>Soda, Eiichi</creatorcontrib><creatorcontrib>Oda, Noriaki</creatorcontrib><creatorcontrib>Saito, Shuichi</creatorcontrib><collection>CrossRef</collection><jtitle>Japanese Journal of Applied Physics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Gawase, Akifumi</au><au>Chikaki, Shinichi</au><au>Nakamura, Naofumi</au><au>Soda, Eiichi</au><au>Oda, Noriaki</au><au>Saito, Shuichi</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure</atitle><jtitle>Japanese Journal of Applied Physics</jtitle><date>2010-05-01</date><risdate>2010</risdate><volume>49</volume><issue>5</issue><spage>05FD02</spage><epage>05FD02-8</epage><pages>05FD02-05FD02-8</pages><issn>0021-4922</issn><eissn>1347-4065</eissn><abstract>The sidewall film in low-$k$/copper interconnects is generally applied to protect the etched low-$k$ surface. However, the existence of this film will become a critical issue with shrinking device sizes. In this work, using intermetal low-$k$ film consisting of scalable porous silica ($k = 2.1$), we tried to eliminate the sidewall film by reducing pore size in 140-nm-pitched scalable porous silica/copper interconnects. Sufficient wiring resistance yield and low wiring capacitance were obtained even in the structure without sidewall. The degradation in the line-to-line leakage caused by the upper layer fabrication process was improved by this sidewall elimination. The mechanism of the leakage degradation was explained by the moisture diffusion from the upper layer, which reacted with the damage site generated by the sidewall formation process.</abstract><pub>The Japan Society of Applied Physics</pub><doi>10.1143/JJAP.49.05FD02</doi></addata></record>
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1347-4065
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recordid cdi_crossref_primary_10_1143_JJAP_49_05FD02
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title Trench Sidewall Elimination Effect on Line-to-Line Leakage Current in Scalable Porous Silica ($k= 2.1$)/Cu Interconnect Structure
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T13%3A27%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ipap_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Trench%20Sidewall%20Elimination%20Effect%20on%20Line-to-Line%20Leakage%20Current%20in%20Scalable%20Porous%20Silica%20($k=%202.1$)/Cu%20Interconnect%20Structure&rft.jtitle=Japanese%20Journal%20of%20Applied%20Physics&rft.au=Gawase,%20Akifumi&rft.date=2010-05-01&rft.volume=49&rft.issue=5&rft.spage=05FD02&rft.epage=05FD02-8&rft.pages=05FD02-05FD02-8&rft.issn=0021-4922&rft.eissn=1347-4065&rft_id=info:doi/10.1143/JJAP.49.05FD02&rft_dat=%3Cipap_cross%3E10_1143_JJAP_49_05FD02%3C/ipap_cross%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c340t-1eaf949fb2ef081e05c9b9cfe802813ceca0235710461df391472b5a123b68a13%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true