Through-Silicon-Via Design with Clustering Structure and Adaptive Through-Silicon-Via Control for Three-Dimentional Solid-State-Drive Boost Converter System

• Published in: Japanese Journal of Applied Physics 2012-02, Vol.51 (2), p.02BE02-02BE02-8
• Main Authors: Johguchi, Koh, Hatanaka, Teruyoshi, Takeuchi, Ken
• Format: Article
• Language: English
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/JJAP.51.02BE02

This paper presents a through-silicon-via (TSV) design methodology for three-dimentional solid-state-drive (3D-SSD) system with the 20 V boost converter. Although TSV technologies give compact packaging and high performance compared to the conventional wire-bonding technology, the parasitic resistors and capacitors of TSVs may cause the performance degradation. Additionally, since the number of the activated NAND chip is dynamically changed as access patterns from real processor, the optimum design point for the boost converter is also moved according to the situation. Then, the clustering method with two different sizes of Cu-TSVs and the adaptive TSV number controlling technique for polycrystalline silicon TSVs are proposed to reduce the parasitic resistors and capacitors. With the cluster structure and Cu-TSVs, the performance of the proposed 3D-SSD is improved by ${\sim}10$%. Furthermore, the adaptive TSV number controller enhances the performance up to 2 times higher for poly-Si TSV case by reducing the parasitic elements due to TSVs.