Channel Recessed One Transistor Dynamic Random Access Memory with SiO 2 /Si 3 N 4 /SiO 2 Gate Dielectric

A fully depleted (FD) single-transistor dynamic random-access memory (1T-DRAM) cell with SiO 2 –Si 3 N 4 –SiO 2 (ONO) stacked gate dielectric was fabricated on a recessed silicon channel. The electrical and memory characteristics of a 1T-DRAM with a stacked ONO gate dielectric were compared with tho...

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Bibliographic Details
Published in:Japanese Journal of Applied Physics 2012-06, Vol.51 (6S), p.6
Main Authors: Park, Jin-Kwon, Yang, Jong-Heon, Cho, Won-Ju
Format: Article
Language:English
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Summary:A fully depleted (FD) single-transistor dynamic random-access memory (1T-DRAM) cell with SiO 2 –Si 3 N 4 –SiO 2 (ONO) stacked gate dielectric was fabricated on a recessed silicon channel. The electrical and memory characteristics of a 1T-DRAM with a stacked ONO gate dielectric were compared with those of 1T-DRAM cell with a single SiO 2 gate insulator. As a result, the FD channel recessed 1T-DRAM cell with an ONO gate insulator provides excellent electrical characteristics such as a high on/off ratio of nearly 10 9 and a low leakage current (
ISSN:0021-4922
1347-4065
DOI:10.1143/JJAP.51.06FE08