Architectural Support for Software-Defined Metadata Processing

• Published in: Computer architecture news 2015-05, Vol.43 (1), p.487-502
• Main Authors: Dhawan, Udit, Hritcu, Catalin, Rubin, Raphael, Vasilakis, Nikos, Chiricescu, Silviu, Smith, Jonathan M., Knight, Thomas F., Pierce, Benjamin C., DeHon, Andre
• Format: Article
• Language: English
• ISSN: 0163-5964
• DOI: 10.1145/2786763.2694383

Optimized hardware for propagating and checking software-programmable metadata tags can achieve low runtime overhead. We generalize prior work on hardware tagging by considering a generic architecture that supports software-defined policies over metadata of arbitrary size and complexity; we introduce several novel microarchitectural optimizations that keep the overhead of this rich processing low. Our model thus achieves the efficiency of previous hardware-based approaches with the flexibility of the software-based ones. We demonstrate this by using it to enforce four diverse safety and security policies---spatial and temporal memory safety, taint tracking, control-flow integrity, and code and data separation---plus a composite policy that enforces all of them simultaneously. Experiments on SPEC CPU2006 benchmarks with a PUMP-enhanced RISC processor show modest impact on runtime (typically under 10%) and power ceiling (less than 10%), in return for some increase in energy usage (typically under 60%) and area for on-chip memory structures (110%).