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SiC Wafer Bonding and Deep Reactive Ion Etching Towards High-Aspect Ratio SiC MEMS Fabrication
High-yield wafer bonding with minimal bonding imperfections and high-aspect etch process of 4H-SiC/SiO2/4H-SiC stacks is presented. The top 4H-SiC layer is thinned, patterned, etched, and is then ready to be released to form the MEMS device layer. An anti-bosch process is used to etch high aspect ra...
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Main Authors: | , , , , , |
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Format: | Conference Proceeding |
Language: | English |
Citations: | Items that cite this one |
Online Access: | Get full text |
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Summary: | High-yield wafer bonding with minimal bonding imperfections and high-aspect etch process of 4H-SiC/SiO2/4H-SiC stacks is presented. The top 4H-SiC layer is thinned, patterned, etched, and is then ready to be released to form the MEMS device layer. An anti-bosch process is used to etch high aspect ratio trenches within the 4H-SiC device layer in the presence of buried oxide; the oxide serves both as a sacrificial layer and as an etch stop. The etch yields an aspect ratio of 10.5 (42.9 μm etch depth : 4.1 μm mask opening) within the 4H-SiC device layer. The handle wafer is 4H-SiC, as opposed to Si, which allows for all SiC-based MEMS devices for high shock resistant and temperature applications. |
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ISSN: | 1938-5862 1938-6737 1938-6737 1938-5862 |
DOI: | 10.1149/08605.0105ecst |