Loading…

Design of Low Power Digital Clock on FPGA using Different IO Standards

Saved in:
Bibliographic Details
Published in:Indian journal of science and technology 2016-06, Vol.9 (21)
Main Authors: Singh, Bakshish, Chodha, Ayushi, Sharma, Bhaskar, Gupta, Akshat, Sethi, Ishan
Format: Article
Language:English
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:
ISSN:0974-6846
0974-5645
DOI:10.17485/ijst/2016/v9i21/94836