Amorphous-silicon gate-driver circuits of shared-node dual pull-down structure with overlapped output signals

— A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature r...

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Bibliographic Details
Published in:Journal of the Society for Information Display 2008-01, Vol.16 (1), p.77-81
Main Authors: Cho, Hyung Nyuck, Kim, Hae Yeol, Ryoo II, Chang, Choi, Seung Chan, Kim, Binn, Jang, Yong Ho, Yoon, Soo Young, Chun, Min Doo, Park, Kwon-shik, Moon, Taewoong, Cho, Nam Wook, Jo, Sung Hak, Kim, Sung Ki, Kim, Chang-Dong, Kang, In Byeong
Format: Article
Language:English
Subjects:
a-Si TFT
CLK
dual pull-down structure
gate driver
overlapped
shift register
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Summary:— A novel gate‐driver circuit using amorphous‐silicon (a‐Si) TFTs has been developed. The circuit has a shared‐node dual pull‐down AC (SDAC) structure with a common‐node controller for two neighboring stages, resulting in a reduced number of TFTs. The overlapped clock signals widen the temperature range for stable operation due to the extended charging time of the inner nodes of the circuit. The accelerated lifetime was found to be over 1000 hours at 60°C with good bias‐temperature‐stress (BTS) characteristics. Accordingly, the a‐Si gate‐driver circuit was successfully integrated into a 14.1‐in. XGA (1024 × RGB × 768) TFT‐LCD panel having a single bank form.
ISSN:1071-0922
1938-3657
DOI:10.1889/1.2835039