A Technique to Reduce Glitch Power during Physical Design Stage for Low Power and Less IR Drop

Saved in:
Bibliographic Details
Published in:International journal of computer applications 2012-02, Vol.39 (18), p.62-67
Main Authors: KumarB.V.P, Vasantha, S. Murthy Sharma, N., Lal Kishore, K.
Format: Article
Language:English
Citations: Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:
ISSN:0975-8887
0975-8887
DOI:10.5120/5086-7450