A Low-Band Multi-Gain LNA Design for Diversity Receive Module with 1.2 dB NF

• Published in: Sensors (Basel, Switzerland) Switzerland), 2021-12, Vol.21 (24), p.8340
• Main Authors: Rikan, Behnam S, Kim, David, Choi, Kyung-Duk, Asl, Seyed Ali H, Yoo, Joon-Mo, Pu, YoungGun, Kim, Seokkee, Huh, Hyungki, Jung, Yeonjae, Lee, Kang-Yoon
• Format: Article
• Language: English
• Subjects: Amplifier design; Amplifiers, Electronic; Antennas; Banded structure; cascade with L degeneration; Cascode transistors; Communication; Degeneration; Design specifications; Electric potential; Frequencies; Frequency ranges; High gain; Inductors; Low noise; low-band LNA; multi-gain mode; phase discontinuity; Specifications; Third order intercept point; Transistors; Voltage
• ISSN: 1424-8220; 1424-8220
• DOI: 10.3390/s21248340

This paper presents and discusses a Low-Band (LB) Low Noise Amplifier (LNA) design for a diversity receive module where the application is for multi-mode cellular handsets. The LB LNA covers the frequency range between 617 MHz to 960 MHz in 5 different frequency bands and a 5 Pole Single Throw (5PST) switch selects the different frequency bands where two of them are for the main and three for the auxiliary bands. The presented structure covers the gain modes from -12 to 18 dB with 6 dB gain steps where each gain mode has a different current consumption. In order to achieve the Noise Figure (NF) specifications in high gain modes, we have adopted a cascode Common-Source (CS) with inductive source degeneration structure for this design. To achieve the S parameters and current consumption specifications, the core and cascode transistors for high gain modes (18 dB, 12 dB, and 6 dB) and low gain modes (0 dB, -6 dB, and -12 dB) have been separated. Nevertheless, to keep the area low and keep the phase discontinuity within ±10∘, we have shared the degeneration and load inductors between two cores. To compensate the performance for Process, Voltage, and Temperature (PVT) variations, the structure applies a Low Drop-Out (LDO) regulator and a corner case voltage compensator. The design has been proceeded in a 65-nm RSB process design kit and the supply voltage is 1 V. For 18 dB and -12 dB gain modes as two examples, the NF, current consumption, and Input Third Order Intercept Point (IIP3) values are 1.2 dB and 16 dB, 10.8 mA and 1.2 mA, and -6 dBm and 8 dBm, respectively.