A Convolve-And-MErge Approach for Exact Computations on High-Performance Reconfigurable Computers

This work presents an approach for accelerating arbitrary-precision arithmetic on high-performance reconfigurable computers (HPRCs). Although faster and smaller, fixed-precision arithmetic has inherent rounding and overflow problems that can cause errors in scientific or engineering applications. Th...

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Bibliographic Details
Published in:International journal of reconfigurable computing 2012-01, Vol.2012 (2012), p.1-14
Main Authors: El-Araby, Esam, Gonzalez, Ivan, Lopez-Buedo, Sergio, El-Ghazawi, Tarek
Format: Article
Language:English
Subjects:
Algorithms
Architectural engineering
Arithmetic
Bioinformatics
Computation
Computer engineering
Computer simulation
Computers
Field programmable gate arrays
Libraries
Mathematical models
Microprocessors
Multiplication
Multiplication & division
Pipelines
Programming languages
Remote sensing
Representations
Software
Studies
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Summary:This work presents an approach for accelerating arbitrary-precision arithmetic on high-performance reconfigurable computers (HPRCs). Although faster and smaller, fixed-precision arithmetic has inherent rounding and overflow problems that can cause errors in scientific or engineering applications. This recurring phenomenon is usually referred to as numerical nonrobustness. Therefore, there is an increasing interest in the paradigm of exact computation, based on arbitrary-precision arithmetic. There are a number of libraries and/or languages supporting this paradigm, for example, the GNU multiprecision (GMP) library. However, the performance of computations is significantly reduced in comparison to that of fixed-precision arithmetic. In order to reduce this performance gap, this paper investigates the acceleration of arbitrary-precision arithmetic on HPRCs. A Convolve-And-MErge approach is proposed, that implements virtual convolution schedules derived from the formal representation of the arbitrary-precision multiplication problem. Additionally, dynamic (nonlinear) pipeline techniques are also exploited in order to achieve speedups ranging from 5x (addition) to 9x (multiplication), while keeping resource usage of the reconfigurable device low, ranging from 11% to 19%.
ISSN:1687-7195
1687-7209
DOI:10.1155/2012/925864