Recent Progress and Challenges Regarding Carbon Nanotube On-Chip Interconnects

• Published in: Micromachines (Basel) 2022-07, Vol.13 (7), p.1148
• Main Authors: Xu, Baohui, Chen, Rongmei, Zhou, Jiuren, Liang, Jie
• Format: Article
• Language: English
• Subjects: Aluminum; Analysis; Carbon; carbon nanotube; Carbon nanotubes; Chemical vapor deposition; Connectors; Cu-CNT composite; Data exchange; Energy efficiency; Fault diagnosis; Grain boundaries; Integrated circuit fabrication; Integrated circuits; Interconnections; Logic; Methods; Microprocessors; Nanotubes; on-chip interconnect; Power consumption; Review; Semiconductor devices; Semiconductors; through-silicon-via (TSV); Transistors; Very large scale integration
• ISSN: 2072-666X; 2072-666X
• DOI: 10.3390/mi13071148

Along with deep scaling transistors and complex electronics information exchange networks, very-large-scale-integrated (VLSI) circuits require high performance and ultra-low power consumption. In order to meet the demand of data-abundant workloads and their energy efficiency, improving only the transistor performance would not be sufficient. Super high-speed microprocessors are useless if the capacity of the data lines is not increased accordingly. Meanwhile, traditional on-chip copper interconnects reach their physical limitation of resistivity and reliability and may no longer be able to keep pace with a processor’s data throughput. As one of the potential alternatives, carbon nanotubes (CNTs) have attracted important attention to become the future emerging on-chip interconnects with possible explorations of new development directions. In this paper, we focus on the electrical, thermal, and process compatibility issues of current on-chip interconnects. We review the advantages, recent developments, and dilemmas of CNT-based interconnects from the perspective of different interconnect lengths and through-silicon-via (TSV) applications.