Ultra-low-power, high PSRR CMOS voltage reference with negative feedback

Based on negative feedback technique, a complementary metal–oxide semiconductor (CMOS) voltage reference with ultra-low-power, low supply voltage and high-power supply rejection ratio (PSRR) is proposed and simulated using a 0.18 standard micrometre CMOS technology. The operating supply voltage rang...

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Bibliographic Details
Published in:IET circuits, devices & systems devices & systems, 2017-11, Vol.11 (6), p.535-542
Main Authors: Zeng, Yanhan, Li, Yuao, Zhang, Xin, Tan, Hong-Zhou
Format: Article
Language:English
Subjects:
circuit feedback
CMOS
CMOS integrated circuits
complementary metal–oxide semiconductor
current 202 nA
Electric potential
frequency 1 Hz
frequency 1 kHz
high-power supply rejection ratio
low supply voltage
low-power electronics
Negative feedback
negative feedback technique
reference circuits
Research Article
Semiconductors
size 0.18 mum
standard micrometre CMOS technology
temperature -20 degC to 80 degC
Transistors
ultra-low-power high PSRR CMOS voltage reference
Voltage
voltage 0.85 V to 2.5 V
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Summary:Based on negative feedback technique, a complementary metal–oxide semiconductor (CMOS) voltage reference with ultra-low-power, low supply voltage and high-power supply rejection ratio (PSRR) is proposed and simulated using a 0.18 standard micrometre CMOS technology. The operating supply voltage ranges from 0.85 V to 2.5 V and the temperature ranges from −20°C to 80°C. The voltage reference can achieve a temperature coefficient of 16.3 ppm/°C and line sensitivity as low as 0.086 ppm/V, without the use of resistors or special devices, consuming 202 nA current at 27°C. Besides, the PSRR is only −113 dB at 1 Hz, −64 dB at 1 kHz, respectively.
ISSN:1751-858X
1751-8598
1751-8598
DOI:10.1049/iet-cds.2016.0452