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Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition
In situ-formed SiO 2 was introduced into HfO 2 gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO 2 /SiO 2 high-k gate dielectric stacks on Ge have been well investigated. It ha...
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Published in: | Nanoscale research letters 2017-05, Vol.12 (1), p.1-370, Article 370 |
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description | In situ-formed SiO
2
was introduced into HfO
2
gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO
2
/SiO
2
high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO
2
deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO
2
degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10
−3
A/cm
2
at gate bias of V
fb
+ 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO
2
/SiO
2
/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO
2
may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD. |
doi_str_mv | 10.1186/s11671-017-2083-z |
format | article |
fullrecord | <record><control><sourceid>proquest_doaj_</sourceid><recordid>TN_cdi_doaj_primary_oai_doaj_org_article_bcecfe2a46684caba61bb95dce5aaed5</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><doaj_id>oai_doaj_org_article_bcecfe2a46684caba61bb95dce5aaed5</doaj_id><sourcerecordid>1903165167</sourcerecordid><originalsourceid>FETCH-LOGICAL-c513t-9981f26198d1adc48bcf4125a7382c3655c11b478b8d2238becbdad60e4140173</originalsourceid><addsrcrecordid>eNp1ksFuEzEQhlcIREvhAbhZ4sKBpTv22uu9IIWQtpEiBakgcbNmvd7EYddO7Q0ofRYeFiepEEXiYo_sfz7P_J4sew3FewApLiOAqCAvoMppIVl-_yQ7B85FTivx7WmKawZ5xSt2lr2IcVMUZVVU4nl2RiUva1bx8-zX3I0mdKgt9u_IrDd6DFYfYnQt-XhYJr1ducG4kUzXGFAnvY2j1ZH4jtx0S3p5bcjtiPp7JD_tuCZzR27tuMuvfBhMm-IlJcdnetybQJo9-dxjHDCfuTU6nSST0Q9Wk8Xx_pPZ-mhH693L7FmHfTSvHvaL7OvV7Mv0Jl8sr-fTySLXHNiY17WEjgqoZQvY6lI2uiuBcqyYpJoJzjVAU1aykS2lTDZGNy22ojAllMk8dpHNT9zW40Ztgx0w7JVHq44HPqwUhtRxb1Sjje4MxVIIWWpsUEDT1LzVhiOalifWhxNru2tS9zr5FrB_BH184-xarfwPxcuSF4wlwNsHQPB3OxNHNdioTd-jM34XFdQFA8HTzyfpm3-kG78LLlmVVJxLKGo4VAQnlQ4-xmC6P8VAoQ5zpE5zpJIV6jBH6j7l0FNOTFq3MuEv8n-TfgMrasvP</addsrcrecordid><sourcetype>Open Website</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>1955810915</pqid></control><display><type>article</type><title>Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition</title><source>Publicly Available Content Database</source><source>IngentaConnect Journals</source><source>PubMed Central</source><creator>Cao, Yan-Qiang ; Wu, Bing ; Wu, Di ; Li, Ai-Dong</creator><creatorcontrib>Cao, Yan-Qiang ; Wu, Bing ; Wu, Di ; Li, Ai-Dong</creatorcontrib><description>In situ-formed SiO
2
was introduced into HfO
2
gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO
2
/SiO
2
high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO
2
deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO
2
degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10
−3
A/cm
2
at gate bias of V
fb
+ 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO
2
/SiO
2
/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO
2
may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.</description><identifier>ISSN: 1931-7573</identifier><identifier>EISSN: 1556-276X</identifier><identifier>DOI: 10.1186/s11671-017-2083-z</identifier><identifier>PMID: 28549375</identifier><language>eng</language><publisher>New York: Springer US</publisher><subject>3rd International Conference on ALD Applications & 2016 China ALD conference ; Alignment ; Annealing ; Atomic layer epitaxy ; Capacitance ; Chemistry and Materials Science ; Conduction ; Conduction bands ; Deposition ; Electrical measurement ; Germanium ; Germanium oxides ; Hafnium oxide ; Interlayers ; Leakage current ; Materials Science ; Molecular Medicine ; Nano Express ; Nanochemistry ; Nanoscale Science and Technology ; Nanotechnology ; Nanotechnology and Microengineering ; Offsets ; Silicates ; Silicon ; Silicon dioxide ; Stacks ; Thermal stability</subject><ispartof>Nanoscale research letters, 2017-05, Vol.12 (1), p.1-370, Article 370</ispartof><rights>The Author(s). 2017</rights><rights>Nanoscale Research Letters is a copyright of Springer, 2017.</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c513t-9981f26198d1adc48bcf4125a7382c3655c11b478b8d2238becbdad60e4140173</citedby><cites>FETCH-LOGICAL-c513t-9981f26198d1adc48bcf4125a7382c3655c11b478b8d2238becbdad60e4140173</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://www.proquest.com/docview/1955810915/fulltextPDF?pq-origsite=primo$$EPDF$$P50$$Gproquest$$Hfree_for_read</linktopdf><linktohtml>$$Uhttps://www.proquest.com/docview/1955810915?pq-origsite=primo$$EHTML$$P50$$Gproquest$$Hfree_for_read</linktohtml><link.rule.ids>230,314,723,776,780,881,25730,27900,27901,36988,36989,44565,53765,53767,75095</link.rule.ids></links><search><creatorcontrib>Cao, Yan-Qiang</creatorcontrib><creatorcontrib>Wu, Bing</creatorcontrib><creatorcontrib>Wu, Di</creatorcontrib><creatorcontrib>Li, Ai-Dong</creatorcontrib><title>Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition</title><title>Nanoscale research letters</title><addtitle>Nanoscale Res Lett</addtitle><description>In situ-formed SiO
2
was introduced into HfO
2
gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO
2
/SiO
2
high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO
2
deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO
2
degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10
−3
A/cm
2
at gate bias of V
fb
+ 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO
2
/SiO
2
/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO
2
may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.</description><subject>3rd International Conference on ALD Applications & 2016 China ALD conference</subject><subject>Alignment</subject><subject>Annealing</subject><subject>Atomic layer epitaxy</subject><subject>Capacitance</subject><subject>Chemistry and Materials Science</subject><subject>Conduction</subject><subject>Conduction bands</subject><subject>Deposition</subject><subject>Electrical measurement</subject><subject>Germanium</subject><subject>Germanium oxides</subject><subject>Hafnium oxide</subject><subject>Interlayers</subject><subject>Leakage current</subject><subject>Materials Science</subject><subject>Molecular Medicine</subject><subject>Nano Express</subject><subject>Nanochemistry</subject><subject>Nanoscale Science and Technology</subject><subject>Nanotechnology</subject><subject>Nanotechnology and Microengineering</subject><subject>Offsets</subject><subject>Silicates</subject><subject>Silicon</subject><subject>Silicon dioxide</subject><subject>Stacks</subject><subject>Thermal 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Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition</title><author>Cao, Yan-Qiang ; Wu, Bing ; Wu, Di ; Li, Ai-Dong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c513t-9981f26198d1adc48bcf4125a7382c3655c11b478b8d2238becbdad60e4140173</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2017</creationdate><topic>3rd International Conference on ALD Applications & 2016 China ALD conference</topic><topic>Alignment</topic><topic>Annealing</topic><topic>Atomic layer epitaxy</topic><topic>Capacitance</topic><topic>Chemistry and Materials Science</topic><topic>Conduction</topic><topic>Conduction bands</topic><topic>Deposition</topic><topic>Electrical measurement</topic><topic>Germanium</topic><topic>Germanium oxides</topic><topic>Hafnium oxide</topic><topic>Interlayers</topic><topic>Leakage current</topic><topic>Materials Science</topic><topic>Molecular Medicine</topic><topic>Nano Express</topic><topic>Nanochemistry</topic><topic>Nanoscale Science and Technology</topic><topic>Nanotechnology</topic><topic>Nanotechnology and Microengineering</topic><topic>Offsets</topic><topic>Silicates</topic><topic>Silicon</topic><topic>Silicon dioxide</topic><topic>Stacks</topic><topic>Thermal stability</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Cao, Yan-Qiang</creatorcontrib><creatorcontrib>Wu, Bing</creatorcontrib><creatorcontrib>Wu, Di</creatorcontrib><creatorcontrib>Li, Ai-Dong</creatorcontrib><collection>Springer Nature OA Free Journals</collection><collection>CrossRef</collection><collection>Aluminium Industry Abstracts</collection><collection>Biotechnology Research Abstracts</collection><collection>Ceramic Abstracts</collection><collection>Computer and Information Systems Abstracts</collection><collection>Corrosion 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letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Cao, Yan-Qiang</au><au>Wu, Bing</au><au>Wu, Di</au><au>Li, Ai-Dong</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition</atitle><jtitle>Nanoscale research letters</jtitle><stitle>Nanoscale Res Lett</stitle><date>2017-05-25</date><risdate>2017</risdate><volume>12</volume><issue>1</issue><spage>1</spage><epage>370</epage><pages>1-370</pages><artnum>370</artnum><issn>1931-7573</issn><eissn>1556-276X</eissn><abstract>In situ-formed SiO
2
was introduced into HfO
2
gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO
2
/SiO
2
high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO
2
deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO
2
degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10
−3
A/cm
2
at gate bias of V
fb
+ 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO
2
/SiO
2
/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO
2
may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.</abstract><cop>New York</cop><pub>Springer US</pub><pmid>28549375</pmid><doi>10.1186/s11671-017-2083-z</doi><oa>free_for_read</oa></addata></record> |
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source | Publicly Available Content Database; IngentaConnect Journals; PubMed Central |
subjects | 3rd International Conference on ALD Applications & 2016 China ALD conference Alignment Annealing Atomic layer epitaxy Capacitance Chemistry and Materials Science Conduction Conduction bands Deposition Electrical measurement Germanium Germanium oxides Hafnium oxide Interlayers Leakage current Materials Science Molecular Medicine Nano Express Nanochemistry Nanoscale Science and Technology Nanotechnology Nanotechnology and Microengineering Offsets Silicates Silicon Silicon dioxide Stacks Thermal stability |
title | Interfacial, Electrical, and Band Alignment Characteristics of HfO2/Ge Stacks with In Situ-Formed SiO2 Interlayer by Plasma-Enhanced Atomic Layer Deposition |
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