Configurable hardware core for IoT object detection

• Published in: Future internet 2021-11, Vol.13 (11), p.1-20
• Main Authors: Miranda, Pedro R., Pestana, Daniel, D. Lopes, João, Duarte, Rui, Véstias, Mário, Cláudio de Campos Neto, Horácio, de Sousa, Jose
• Format: Article
• Language: English
• Subjects: Accuracy; Algorithms; Boxes; Custom design; Field programmable gate arrays; FPGA; Hardware; Internet of Things; Low cost; Machine learning; Neural networks; Object detection; Object recognition; Sensors; Standard deviation; System on chip; YOLO
• ISSN: 1999-5903; 1999-5903
• DOI: 10.3390/fi13110280

Este trabalho foi financiado pelo Concurso Anual para Projetos de Investigação, Desenvolvimento, Inovação e Criação Artística (IDI&CA) 2020 do Instituto Politécnico de Lisboa. Código de referência IPL/2020/TRAINEE/ISEL Object detection is an important task for many applications, like transportation, security, and medical applications. Many of these applications are needed on edge devices to make local decisions. Therefore, it is necessary to provide low-cost, fast solutions for object detection. This work proposes a configurable hardware core on a field-programmable gate array (FPGA) for object detection. The configurability of the core allows its deployment on target devices with diverse hardware resources. The object detection accelerator is based on YOLO, for its good accuracy at moderate computational complexity. The solution was applied to the design of a core to accelerate the Tiny-YOLOv3, based on a CNN developed for constrained environments. However, it can be applied to other YOLO versions. The core was integrated into a full system-on-chip solution and tested with the COCO dataset. It achieved a performance from 7 to 14 FPS in a low-cost ZYNQ7020 FPGA, depending on the quantization, with an accuracy reduction from 2.1 to 1.4 points of mAP50.