A 13-Bit, 12-ps Resolution Vernier Time-to-Digital Converter Based on Dual Delay-Rings for SPAD Image Sensor

A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance TDC for a SPAD image sensor. In our design, w...

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Bibliographic Details
Published in:Sensors (Basel, Switzerland) Switzerland), 2021-01, Vol.21 (3), p.743
Main Authors: Huang, Zunkai, Huang, Jinglin, Tian, Li, Wang, Ning, Zhu, Yongxin, Wang, Hui, Feng, Songlin
Format: Article
Language:English
Subjects:
Avalanche diodes
Circuits
CMOS
Converters
Delay
Digital imaging
Dynamic range
fully symmetric arbiter
Light
Microprocessors
Nonlinearity
Number systems
Photon avalanches
Pulse duration
pulse-width self-restricted (PWSR) delay element
Sensors
Three dimensional imaging
three-dimensional (3D) image sensor
time-to-digital converter (TDC)
Topology
vernier
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Summary:A three-dimensional (3D) image sensor based on Single-Photon Avalanche Diode (SPAD) requires a time-to-digital converter (TDC) with a wide dynamic range and fine resolution for precise depth calculation. In this paper, we propose a novel high-performance TDC for a SPAD image sensor. In our design, we first present a pulse-width self-restricted (PWSR) delay element that is capable of providing a steady delay to improve the time precision. Meanwhile, we employ the proposed PWSR delay element to construct a pair of 16-stages vernier delay-rings to effectively enlarge the dynamic range. Moreover, we propose a compact and fast arbiter using a fully symmetric topology to enhance the robustness of the TDC. To validate the performance of the proposed TDC, a prototype 13-bit TDC has been fabricated in the standard 0.18-µm complementary metal-oxide-semiconductor (CMOS) process. The core area is about 200 µm × 180 µm and the total power consumption is nearly 1.6 mW. The proposed TDC achieves a dynamic range of 92.1 ns and a time precision of 11.25 ps. The measured worst integral nonlinearity (INL) and differential nonlinearity (DNL) are respectively 0.65 least-significant-bit (LSB) and 0.38 LSB, and both of them are less than 1 LSB. The experimental results indicate that the proposed TDC is suitable for SPAD-based 3D imaging applications.
ISSN:1424-8220
1424-8220
DOI:10.3390/s21030743