Visual software system for memory interleaving simulation

This paper describes the visual software system for memory interleaving simulation (VSMIS), implemented for the purpose of the course Computer Architecture and Organization 1, at the School of Electrical Engineering, University of Belgrade. The simulator enables students to expand their knowledge th...

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Bibliographic Details
Published in:Serbian journal of electrical engineering 2017, Vol.14 (1), p.51-66
Main Authors: Milenkovic, Katarina, Stanisavljevic, Zarko, Djordjevic, Jovan
Format: Article
Language:English
Subjects:
computer architecture and organization
laboratory exercise
main memory
memory interleaving
random-access memory
simulation
software system
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Summary:This paper describes the visual software system for memory interleaving simulation (VSMIS), implemented for the purpose of the course Computer Architecture and Organization 1, at the School of Electrical Engineering, University of Belgrade. The simulator enables students to expand their knowledge through practical work in the laboratory, as well as through independent work at home. VSMIS gives users the possibility to initialize parts of the system and to control simulation steps. The user has the ability to monitor simulation through graphical representation. It is possible to navigate through the entire hierarchy of the system using simple navigation. During the simulation the user can observe and set the values of the memory location. At any time, the user can reset the simulation of the system and observe it for different memory states; in addition, it is possible to save the current state of the simulation and continue with the execution of the simulation later.
ISSN:1451-4869
2217-7183
DOI:10.2298/SJEE1701051M