Tolerance Analysis and Related Measurements on MVL-CCD's (Multiple-Valued Logic-Charge-Coupled Devices)

Prior to designing an MVL system on a single silicon chip, it is necessary to perform a feasibility study on the marginal reliability aspects of the system to be implemented. In this paper, the expected tolerances in basic CCD gate configurations are investigated by a statistical approach to the pro...

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Bibliographic Details
Main Authors: Kerhoff,H. G, Groot,J. de, Brombacher,A. C
Format: Report
Language:English
Subjects:
Charge coupled devices
Chips(Electronics)
Component Reports
Configurations
Gates(Circuits)
Input output devices
Logic circuits
Monte Carlo method
Multiple valued logic
Netherlands
Quaternary logic
Reliability
Silicon
Statistical processes
Symposia
Tolerance
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Summary:Prior to designing an MVL system on a single silicon chip, it is necessary to perform a feasibility study on the marginal reliability aspects of the system to be implemented. In this paper, the expected tolerances in basic CCD gate configurations are investigated by a statistical approach to the problem for which the Monte Carlo analysis method has been chosen. The expected tolerances were compared with actual data obtained from measurements. As any MVL function can be synthesized by means of these configurations, the tolerance behaviour of a function can be investigated by a general applicable analysis method based on the Monte Carlo tolerance analysis approach. The predecessor circuit was used to illustrate the procedure followed. (Author) This article is from 'Proceedings of the International Symposium on Multiple-Valued Logic (13th) Held at Kyoto, Japan on May 23-25, 1983,' AD-A136 457, p152-161.