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High frequency CV measurements of SiC MOS capacitors

MOS capacitors have been fabricated on a p-type 6H–SiC substrate with 〈0001〉Si orientation. The oxide was thermally grown under wet conditions. High frequency CV measurements have been carried out with different sweep rates and stress times in darkness and under different illumination conditions. Th...

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Bibliographic Details
Published in:Solid-state electronics 1998-06, Vol.42 (6), p.915-920
Main Authors: Berberich, S, Godignon, P, Locatelli, M.L, Millán, J, Hartnagel, H.L
Format: Article
Language:English
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Summary:MOS capacitors have been fabricated on a p-type 6H–SiC substrate with 〈0001〉Si orientation. The oxide was thermally grown under wet conditions. High frequency CV measurements have been carried out with different sweep rates and stress times in darkness and under different illumination conditions. The bump which appears in the CV curves is most likely a 6H–SiC manifestation of nonequilibrium effects. A hook which occurs in deep depletion when the structure is measured with UV light is observed. The density of states has been determined using the Terman method and the conductance technique including band bending fluctuations. Due to nonequilibrium effects in the semiconductor occurring during CV measurements, the Terman method induces errors in the extraction of the interface trap density of SiC MOS devices. The low value of the standard deviation of the surface potential was assumed to be rather due to the large interface state density than to an improvement of the SiC/SiO 2 interface. The extracted D it values at the SiC/SiO 2 interface are in the range of 10 12 cm −2 eV −1, similar to those available in literature for this oxidation temperature.
ISSN:0038-1101
1879-2405
DOI:10.1016/S0038-1101(98)00122-1