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Virtual metrology on semiconductor manufacturing based on Just-in-time learningThis work is a part of the European project ”INTEGRATE”, and carried by STMicroelectronics Fab
This paper deals with missing data in semiconductor manufacturing derived from measurements sampling strategies. The idea is to construct a virtual metrology module to estimate non measured variables using a new modified Just-In-Time Learning approach (JITL). The classical method has been proposed a...
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Published in: | IFAC-PapersOnLine 2016, Vol.49 (12), p.89-94 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | This paper deals with missing data in semiconductor manufacturing derived from measurements sampling strategies. The idea is to construct a virtual metrology module to estimate non measured variables using a new modified Just-In-Time Learning approach (JITL). The classical method has been proposed and applied in the chemical process. This latter presents some drawbacks and our main contribution is to improve the existing algorithm version of the JITL approach. The effectiveness of our proposed method is illustrated by using simulation examples that enable to compare simulation results obtained with the old and the new version. |
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ISSN: | 2405-8963 2405-8963 |
DOI: | 10.1016/j.ifacol.2016.07.555 |