New reliability model for power SiC MOSFET technologies under static and dynamic gate stress

This work investigates the V th degradation of commercial power SiC MOSFET technologies under HTGB and AC stresses with Gate Switching Stress conditions by using relatively accelerated tests whose stressors do not exceed the datasheet specifications. A new model that takes into consideration the var...

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Bibliographic Details
Published in:Microelectronics and reliability 2023-11, Vol.150, p.115190, Article 115190
Main Authors: Zerarka, M., Rustichelli, V., Perrotin, O., Reynes, J.M., Tremouilles, D., Azzopardi, S., Serre, A., Bergeret, F., Allirand, L., Coccetti, F.
Format: Article
Language:English
Subjects:
Engineering Sciences
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Summary:This work investigates the V th degradation of commercial power SiC MOSFET technologies under HTGB and AC stresses with Gate Switching Stress conditions by using relatively accelerated tests whose stressors do not exceed the datasheet specifications. A new model that takes into consideration the variability of the exponent of powerlaw for V th drift has been proposed and experimentally verified on planar and trench technologies. The proposed model is useful to estimate accurately the lifetime for any condition or complex mission profile.
ISSN:0026-2714
1872-941X
DOI:10.1016/j.microrel.2023.115190