First Demonstration of GAA Monolayer-MoS2 Nanosheet nFET with 410μA μ m ID 1V VD at 40nm gate length

• Main Authors: Chung, Yun-Yan, Chou, Bo-Jhih, Hsu, Chen-Feng, Yun, Wei-Sheng, Li, Ming-Yang, Su, Sheng-Kai, Liao, Yu-Tsung, Lee, Meng-Chien, Huang, Guo-Wei, Liew, San-Lin, Shen, Yun-Yang, Chang, Wen-Hao, Chen, Chien-Wei, Kei, Chi-Chung, Wang, Han, Philip Wong, H.-S., Lee, T. Y., Chien, Chao-Hsin, Cheng, Chao-Ching, Radu, Iuliana P.
• Format: Conference Proceeding
• Language: English
• Subjects: Field effect transistors; Gallium arsenide; Logic gates; Nanoscale devices; Performance evaluation; Stacking; Sulfur
• ISSN: 2156-017X
• DOI: 10.1109/IEDM45625.2022.10019563

This work demonstrates the first successful integration of monolayer MoS 2 nanosheet FET in a gate-all-around configuration. At a gate length of 40nm, the transistor exhibits a remarkable \mathrm{I}_{\mathrm{ON}} \sim 410 \mu \mathrm{A}/ {\mu} \mathrm{m} at \mathrm{V}_{\mathrm{DS}}=1\ \mathrm{V}, achieved with a monolayer channel, '0.7 nm thin. The FET has a large \mathrm{I}_{\mathrm{ON}}/ \mathrm{I}_{\mathrm{OFF}} \gt 1\mathrm{E}8, positive \mathrm{V}_{\mathrm{TH}} \sim 1.4\ \mathrm{V} with nearly zero DIBL. Higher drive current can be achieved through stacking of multiple channel layers. We propose here a fully integrated flow and we detail the feasibility of the most critical modules: stack/channel preparation, fin patterning, inner spacer, channel release, contact. The successful demonstration of MoS 2 NS with high performance and of the stacked NS modules further clarifies the value proposition in 2D materials for transistor scaling.