DLT replacement and synchronization in the digital hybrid PLL frequency synthesizer

The conventional PLL (phase locked loop) frequency synthesizer has a long switching time because of the inherent closed-loop structure. The digital hybrid PLL (DH-PLL) which includes the open loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on consumer electronics 2002-02, Vol.48 (1), p.151-156, Article 151
Main Authors: Ryu, Heung-Gyoon, Ahn, Eung-jin
Format: Article
Language:English
Subjects:
Circuit synthesis
Complexity
Computer simulation
DH-HEMTs
Digital
Energy consumption
Frequency synchronization
Frequency synthesizers
Hardware
High speed
Phase locked loops
Power consumption
Read only memory
Switching
Synchronism
Synthesis
Table lookup
Voltage-controlled oscillators
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:The conventional PLL (phase locked loop) frequency synthesizer has a long switching time because of the inherent closed-loop structure. The digital hybrid PLL (DH-PLL) which includes the open loop structure into the conventional PLL synthesizer has been studied to overcome this demerit. It operates in high speed, but the hardware complexity and power consumption are a serious problem because the DLT (digital look-up table) is usually implemented by the ROM which contains the transfer characteristic of VCO (voltage controlled oscillator). This paper proposes a new DH-PLL using a very simple DLT-replacement digital logic instead of the complex ROM-type DLT. Also, a timing synchronization circuit which makes the negligible overshoot and much shorter settling time is designed for the ultra fast switching speed at every frequency synthesis. Also, the hardware complexity and power consumption are decreased to about 28%, as compared with the conventional DH-PLL. The high speed switching characteristic in the frequency synthesis process is verified by computer simulation.
ISSN:0098-3063
1558-4127
DOI:10.1109/TCE.2002.1010105