Depassivation of Traps in the Polysilicon Channel of 3D NAND Flash Arrays: Impact on Cell High-Temperature Data Retention

In this paper, we report clear experimental evidence proving that programmed cells in a 3D NAND Flash memory array may experience an unexpected average increase in their threshold voltage (V T ) during high-temperature data retention. The phenomenon is explored as a function of the V T level of the...

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Bibliographic Details
Main Authors: Giulianini, Mattia, Malavena, Gerardo, Chiavarone, Luca, Spinelli, Alessandro S., Compagnoni, Christian Monzio
Format: Conference Proceeding
Language:English
Subjects:
3D array
Arrays
NAND Flash memory
polysilicon
Reliability engineering
semiconductor device reliability
Temperature dependence
Temperature measurement
Temperature sensors
Three-dimensional displays
Threshold voltage
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Summary:In this paper, we report clear experimental evidence proving that programmed cells in a 3D NAND Flash memory array may experience an unexpected average increase in their threshold voltage (V T ) during high-temperature data retention. The phenomenon is explored as a function of the V T level of the monitored cells, the string back-pattern, and the data-retention temperature. A physical picture is then proposed to explain its origin, which is traced back to the depassivation of some traps in the polysilicon channel of the 3D NAND strings. Results point out a new reliability issue to address and tackle in the design of next generation 3D NAND Flash technologies.
ISSN:1938-1891
DOI:10.1109/IRPS48203.2023.10117584