Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages

For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit o...

Full description

Saved in:
Bibliographic Details
Main Authors: June, M.S., Sikka, K.K.
Format: Conference Proceeding
Language:English
Subjects:
Conducting materials
Electronic packaging thermal management
Electronics cooling
Electronics packaging
Microelectronics
Microprocessor chips
Power dissipation
Temperature distribution
Thermal conductivity
Thermal resistance
Online Access:Request full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit of the standoffs is shown experimentally and validated using thermal modeling. Thermal modeling is then extended to non-uniform power dissipation chips. Results show that the chip hot-spot temperature can be reduced by 5-10 /spl deg/C in a 100 W electronic package.
ISSN:1089-9870
DOI:10.1109/ITHERM.2002.1012454