Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages

For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit o...

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Main Authors: June, M.S., Sikka, K.K.
Format: Conference Proceeding
Language:English
Subjects:
Conducting materials
Electronic packaging thermal management
Electronics cooling
Electronics packaging
Microelectronics
Microprocessor chips
Power dissipation
Temperature distribution
Thermal conductivity
Thermal resistance
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Sikka, K.K.
description For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit of the standoffs is shown experimentally and validated using thermal modeling. Thermal modeling is then extended to non-uniform power dissipation chips. Results show that the chip hot-spot temperature can be reduced by 5-10 /spl deg/C in a 100 W electronic package.
doi_str_mv 10.1109/ITHERM.2002.1012454
format conference_proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_1012454</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1012454</ieee_id><sourcerecordid>1012454</sourcerecordid><originalsourceid>FETCH-LOGICAL-i173t-a5344199323a6f1dad1f90a9901cda114d33747d01fb74df6b0a7884ed2b84de3</originalsourceid><addsrcrecordid>eNotkMFqAjEURQNtodb6BW7yA2Pfm2TMZFnEVsFSKArdyXPyoml1Zkjion9fQe_mbA5ncYUYI0wQwb4s14v518ekBCgnCFjqSt-JJzA1KINVOb0XA4TaFrY28ChGKf3AZRcLKjUQ35sU2r1sqC9Cm3kf6ShTptZ13ieZOxnZnRuWzSH08tDlIvVdlplPPUfK58hJhlbykZscuzY0sqfml_acnsWDp2Pi0Y1DsXmbr2eLYvX5vpy9roqARuWCKqU1WqtKRVOPjhx6C2QtYOMIUTuljDYO0O-Mdn66AzJ1rdmVu1o7VkMxvnYDM2_7GE4U_7a3I9Q_S1ZTVw</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>June, M.S. ; Sikka, K.K.</creator><creatorcontrib>June, M.S. ; Sikka, K.K.</creatorcontrib><description>For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit of the standoffs is shown experimentally and validated using thermal modeling. Thermal modeling is then extended to non-uniform power dissipation chips. Results show that the chip hot-spot temperature can be reduced by 5-10 /spl deg/C in a 100 W electronic package.</description><identifier>ISSN: 1089-9870</identifier><identifier>ISBN: 0780371526</identifier><identifier>ISBN: 9780780371521</identifier><identifier>DOI: 10.1109/ITHERM.2002.1012454</identifier><language>eng</language><publisher>IEEE</publisher><subject>Conducting materials ; Electronic packaging thermal management ; Electronics cooling ; Electronics packaging ; Microelectronics ; Microprocessor chips ; Power dissipation ; Temperature distribution ; Thermal conductivity ; Thermal resistance</subject><ispartof>ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258), 2002, p.173-178</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1012454$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,2058,4050,4051,27925,54920</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1012454$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>June, M.S.</creatorcontrib><creatorcontrib>Sikka, K.K.</creatorcontrib><title>Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages</title><title>ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)</title><addtitle>ITHERM</addtitle><description>For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit of the standoffs is shown experimentally and validated using thermal modeling. Thermal modeling is then extended to non-uniform power dissipation chips. Results show that the chip hot-spot temperature can be reduced by 5-10 /spl deg/C in a 100 W electronic package.</description><subject>Conducting materials</subject><subject>Electronic packaging thermal management</subject><subject>Electronics cooling</subject><subject>Electronics packaging</subject><subject>Microelectronics</subject><subject>Microprocessor chips</subject><subject>Power dissipation</subject><subject>Temperature distribution</subject><subject>Thermal conductivity</subject><subject>Thermal resistance</subject><issn>1089-9870</issn><isbn>0780371526</isbn><isbn>9780780371521</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2002</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotkMFqAjEURQNtodb6BW7yA2Pfm2TMZFnEVsFSKArdyXPyoml1Zkjion9fQe_mbA5ncYUYI0wQwb4s14v518ekBCgnCFjqSt-JJzA1KINVOb0XA4TaFrY28ChGKf3AZRcLKjUQ35sU2r1sqC9Cm3kf6ShTptZ13ieZOxnZnRuWzSH08tDlIvVdlplPPUfK58hJhlbykZscuzY0sqfml_acnsWDp2Pi0Y1DsXmbr2eLYvX5vpy9roqARuWCKqU1WqtKRVOPjhx6C2QtYOMIUTuljDYO0O-Mdn66AzJ1rdmVu1o7VkMxvnYDM2_7GE4U_7a3I9Q_S1ZTVw</recordid><startdate>2002</startdate><enddate>2002</enddate><creator>June, M.S.</creator><creator>Sikka, K.K.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2002</creationdate><title>Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages</title><author>June, M.S. ; Sikka, K.K.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i173t-a5344199323a6f1dad1f90a9901cda114d33747d01fb74df6b0a7884ed2b84de3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2002</creationdate><topic>Conducting materials</topic><topic>Electronic packaging thermal management</topic><topic>Electronics cooling</topic><topic>Electronics packaging</topic><topic>Microelectronics</topic><topic>Microprocessor chips</topic><topic>Power dissipation</topic><topic>Temperature distribution</topic><topic>Thermal conductivity</topic><topic>Thermal resistance</topic><toplevel>online_resources</toplevel><creatorcontrib>June, M.S.</creatorcontrib><creatorcontrib>Sikka, K.K.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>June, M.S.</au><au>Sikka, K.K.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages</atitle><btitle>ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)</btitle><stitle>ITHERM</stitle><date>2002</date><risdate>2002</risdate><spage>173</spage><epage>178</epage><pages>173-178</pages><issn>1089-9870</issn><isbn>0780371526</isbn><isbn>9780780371521</isbn><abstract>For high-power electronic packages, chip hot-spots and cross-chip temperature gradients represent a significant portion of the total thermal resistance from chip to ambient. This paper presents a technique of reducing the chip hot-spot temperatures using cap integral standoffs. The thermal benefit of the standoffs is shown experimentally and validated using thermal modeling. Thermal modeling is then extended to non-uniform power dissipation chips. Results show that the chip hot-spot temperature can be reduced by 5-10 /spl deg/C in a 100 W electronic package.</abstract><pub>IEEE</pub><doi>10.1109/ITHERM.2002.1012454</doi><tpages>6</tpages></addata></record>
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identifier ISSN: 1089-9870
ispartof ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258), 2002, p.173-178
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Conducting materials
Electronic packaging thermal management
Electronics cooling
Electronics packaging
Microelectronics
Microprocessor chips
Power dissipation
Temperature distribution
Thermal conductivity
Thermal resistance
title Using cap-integral standoffs to reduce chip hot-spot temperatures in electronic packages
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T12%3A31%3A28IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Using%20cap-integral%20standoffs%20to%20reduce%20chip%20hot-spot%20temperatures%20in%20electronic%20packages&rft.btitle=ITherm%202002.%20Eighth%20Intersociety%20Conference%20on%20Thermal%20and%20Thermomechanical%20Phenomena%20in%20Electronic%20Systems%20(Cat.%20No.02CH37258)&rft.au=June,%20M.S.&rft.date=2002&rft.spage=173&rft.epage=178&rft.pages=173-178&rft.issn=1089-9870&rft.isbn=0780371526&rft.isbn_list=9780780371521&rft_id=info:doi/10.1109/ITHERM.2002.1012454&rft_dat=%3Cieee_6IE%3E1012454%3C/ieee_6IE%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i173t-a5344199323a6f1dad1f90a9901cda114d33747d01fb74df6b0a7884ed2b84de3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=1012454&rfr_iscdi=true