WCET Analysis of Shared Caches in Multi -Core Architectures using Event-Arrival Curves

We propose a novel analysis approach for shared LRU caches to classify accesses as definitive cache hits or potential misses. In this approach inter-core cache interference is modelled as an event stream. Thus, by analyzing the timing between subsequent accesses to a particular cache block, it is po...

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Bibliographic Details
Main Authors: Fischer, Thilo L., Falk, Heiko
Format: Conference Proceeding
Language:English
Subjects:
Complex systems
Interference
multi-core
shared cache
Task analysis
Time division multiple access
Timing
WCET analysis
Online Access:Request full text
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Description
Summary:We propose a novel analysis approach for shared LRU caches to classify accesses as definitive cache hits or potential misses. In this approach inter-core cache interference is modelled as an event stream. Thus, by analyzing the timing between subsequent accesses to a particular cache block, it is possible to bound the inter-core interference. This perspective allows us to classify accesses as cache hits or potential misses using a data-flow analysis. We compare the performance of the presented approach to a partitioning of the shared cache.
ISSN:1558-1101
DOI:10.23919/DATE56975.2023.10137034