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Modeling of a SiC Drift Step Recovery Diode Stack in Silvaco Atlas

This paper details the development of a Silvaco Atlas model to simulate a high voltage SiC Drift Step Recovery Diode (DSRD) stack. The model developed is based on the DC and transient parameters found from characterizing the device. The model is benchmarked using atlas mixed-mode simulations against...

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Main Authors:	Graves, David Z., Bilbao, Argenis V., Bayne, Stephen B., Schrock, Emily A., Miller, Seth, Phillips, James
Format:	Conference Proceeding
Language:	English
Subjects:	Analytical models Benchmark testing Drift Step Recovery Diodes High-voltage techniques Integrated circuit modeling Pulsed Power Semiconductors Silicon Silicon carbide Silvaco Atlas Steady-state
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creator	Graves, David Z. Bilbao, Argenis V. Bayne, Stephen B. Schrock, Emily A. Miller, Seth Phillips, James
description	This paper details the development of a Silvaco Atlas model to simulate a high voltage SiC Drift Step Recovery Diode (DSRD) stack. The model developed is based on the DC and transient parameters found from characterizing the device. The model is benchmarked using atlas mixed-mode simulations against different physical testbeds for a complete comparative analysis. The successful development of the model allows greater insight into the operations of the device stack and faster optimization of pulsed power generators where the device is utilized.
doi_str_mv	10.1109/PPC47928.2023.10310710
format	conference_proceeding
fullrecord	<record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_10310710</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>10310710</ieee_id><sourcerecordid>10310710</sourcerecordid><originalsourceid>FETCH-LOGICAL-i119t-8d7156b9538297cf1c00287f3f85467e87e8823447947ddacd390c05cf50cb703</originalsourceid><addsrcrecordid>eNo1j-FKwzAUhaMgOGbfQCQv0HqTm-wmP2enU5g4nP4eWZpItK6jLYO9vQH1cODA4ePAYexGQCUE2Nv1ulZkpakkSKwEoAAScMYKS9agBkSJaM_ZRAptSmUlXrJiGD4hi8gqOZuwu-euCW3af_Aucsc3qeaLPsWRb8Zw4K_Bd8fQn_giZSx3zn_xtM9Ye3S-4_OxdcMVu4iuHULxl1P2_nD_Vj-Wq5flUz1flUkIO5amIaFnO6vRSEs-Cg8gDUWMRqsZBZNtJKp8SVHTON-gBQ_aRw1-R4BTdv27m0II20Ofvl1_2v7fxh8kI0ly</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Modeling of a SiC Drift Step Recovery Diode Stack in Silvaco Atlas</title><source>IEEE Xplore All Conference Series</source><creator>Graves, David Z. ; Bilbao, Argenis V. ; Bayne, Stephen B. ; Schrock, Emily A. ; Miller, Seth ; Phillips, James</creator><creatorcontrib>Graves, David Z. ; Bilbao, Argenis V. ; Bayne, Stephen B. ; Schrock, Emily A. ; Miller, Seth ; Phillips, James</creatorcontrib><description>This paper details the development of a Silvaco Atlas model to simulate a high voltage SiC Drift Step Recovery Diode (DSRD) stack. The model developed is based on the DC and transient parameters found from characterizing the device. The model is benchmarked using atlas mixed-mode simulations against different physical testbeds for a complete comparative analysis. The successful development of the model allows greater insight into the operations of the device stack and faster optimization of pulsed power generators where the device is utilized.</description><identifier>EISSN: 2158-4923</identifier><identifier>EISBN: 9798350332339</identifier><identifier>DOI: 10.1109/PPC47928.2023.10310710</identifier><language>eng</language><publisher>IEEE</publisher><subject>Analytical models ; Benchmark testing ; Drift Step Recovery Diodes ; High-voltage techniques ; Integrated circuit modeling ; Pulsed Power ; Semiconductors ; Silicon ; Silicon carbide ; Silvaco Atlas ; Steady-state</subject><ispartof>2023 IEEE Pulsed Power Conference (PPC), 2023, p.1-5</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10310710$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/10310710$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Graves, David Z.</creatorcontrib><creatorcontrib>Bilbao, Argenis V.</creatorcontrib><creatorcontrib>Bayne, Stephen B.</creatorcontrib><creatorcontrib>Schrock, Emily A.</creatorcontrib><creatorcontrib>Miller, Seth</creatorcontrib><creatorcontrib>Phillips, James</creatorcontrib><title>Modeling of a SiC Drift Step Recovery Diode Stack in Silvaco Atlas</title><title>2023 IEEE Pulsed Power Conference (PPC)</title><addtitle>PPC</addtitle><description>This paper details the development of a Silvaco Atlas model to simulate a high voltage SiC Drift Step Recovery Diode (DSRD) stack. The model developed is based on the DC and transient parameters found from characterizing the device. The model is benchmarked using atlas mixed-mode simulations against different physical testbeds for a complete comparative analysis. The successful development of the model allows greater insight into the operations of the device stack and faster optimization of pulsed power generators where the device is utilized.</description><subject>Analytical models</subject><subject>Benchmark testing</subject><subject>Drift Step Recovery Diodes</subject><subject>High-voltage techniques</subject><subject>Integrated circuit modeling</subject><subject>Pulsed Power</subject><subject>Semiconductors</subject><subject>Silicon</subject><subject>Silicon carbide</subject><subject>Silvaco Atlas</subject><subject>Steady-state</subject><issn>2158-4923</issn><isbn>9798350332339</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2023</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1j-FKwzAUhaMgOGbfQCQv0HqTm-wmP2enU5g4nP4eWZpItK6jLYO9vQH1cODA4ePAYexGQCUE2Nv1ulZkpakkSKwEoAAScMYKS9agBkSJaM_ZRAptSmUlXrJiGD4hi8gqOZuwu-euCW3af_Aucsc3qeaLPsWRb8Zw4K_Bd8fQn_giZSx3zn_xtM9Ye3S-4_OxdcMVu4iuHULxl1P2_nD_Vj-Wq5flUz1flUkIO5amIaFnO6vRSEs-Cg8gDUWMRqsZBZNtJKp8SVHTON-gBQ_aRw1-R4BTdv27m0II20Ofvl1_2v7fxh8kI0ly</recordid><startdate>20230625</startdate><enddate>20230625</enddate><creator>Graves, David Z.</creator><creator>Bilbao, Argenis V.</creator><creator>Bayne, Stephen B.</creator><creator>Schrock, Emily A.</creator><creator>Miller, Seth</creator><creator>Phillips, James</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>20230625</creationdate><title>Modeling of a SiC Drift Step Recovery Diode Stack in Silvaco Atlas</title><author>Graves, David Z. ; Bilbao, Argenis V. ; Bayne, Stephen B. ; Schrock, Emily A. ; Miller, Seth ; Phillips, James</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i119t-8d7156b9538297cf1c00287f3f85467e87e8823447947ddacd390c05cf50cb703</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Analytical models</topic><topic>Benchmark testing</topic><topic>Drift Step Recovery Diodes</topic><topic>High-voltage techniques</topic><topic>Integrated circuit modeling</topic><topic>Pulsed Power</topic><topic>Semiconductors</topic><topic>Silicon</topic><topic>Silicon carbide</topic><topic>Silvaco Atlas</topic><topic>Steady-state</topic><toplevel>online_resources</toplevel><creatorcontrib>Graves, David Z.</creatorcontrib><creatorcontrib>Bilbao, Argenis V.</creatorcontrib><creatorcontrib>Bayne, Stephen B.</creatorcontrib><creatorcontrib>Schrock, Emily A.</creatorcontrib><creatorcontrib>Miller, Seth</creatorcontrib><creatorcontrib>Phillips, James</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Graves, David Z.</au><au>Bilbao, Argenis V.</au><au>Bayne, Stephen B.</au><au>Schrock, Emily A.</au><au>Miller, Seth</au><au>Phillips, James</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Modeling of a SiC Drift Step Recovery Diode Stack in Silvaco Atlas</atitle><btitle>2023 IEEE Pulsed Power Conference (PPC)</btitle><stitle>PPC</stitle><date>2023-06-25</date><risdate>2023</risdate><spage>1</spage><epage>5</epage><pages>1-5</pages><eissn>2158-4923</eissn><eisbn>9798350332339</eisbn><abstract>This paper details the development of a Silvaco Atlas model to simulate a high voltage SiC Drift Step Recovery Diode (DSRD) stack. The model developed is based on the DC and transient parameters found from characterizing the device. The model is benchmarked using atlas mixed-mode simulations against different physical testbeds for a complete comparative analysis. The successful development of the model allows greater insight into the operations of the device stack and faster optimization of pulsed power generators where the device is utilized.</abstract><pub>IEEE</pub><doi>10.1109/PPC47928.2023.10310710</doi><tpages>5</tpages></addata></record>
fulltext	fulltext_linktorsrc
identifier	EISSN: 2158-4923
ispartof	2023 IEEE Pulsed Power Conference (PPC), 2023, p.1-5
issn	2158-4923
language	eng
recordid	cdi_ieee_primary_10310710
source	IEEE Xplore All Conference Series
subjects	Analytical models Benchmark testing Drift Step Recovery Diodes High-voltage techniques Integrated circuit modeling Pulsed Power Semiconductors Silicon Silicon carbide Silvaco Atlas Steady-state
title	Modeling of a SiC Drift Step Recovery Diode Stack in Silvaco Atlas
url	http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-27T14%3A30%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Modeling%20of%20a%20SiC%20Drift%20Step%20Recovery%20Diode%20Stack%20in%20Silvaco%20Atlas&rft.btitle=2023%20IEEE%20Pulsed%20Power%20Conference%20(PPC)&rft.au=Graves,%20David%20Z.&rft.date=2023-06-25&rft.spage=1&rft.epage=5&rft.pages=1-5&rft.eissn=2158-4923&rft_id=info:doi/10.1109/PPC47928.2023.10310710&rft.eisbn=9798350332339&rft_dat=%3Cieee_CHZPO%3E10310710%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i119t-8d7156b9538297cf1c00287f3f85467e87e8823447947ddacd390c05cf50cb703%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=10310710&rfr_iscdi=true