HBM3 PPA Performance Evaluation by TSV Model with Micro-Bump and Hybrid Bonding

In this paper, through-silicon via (TSV) circuit models for the third generation of high bandwidth memory (HBM3) are developed utilizing 3D IC stacking technology with micro-bump or hybrid bonding. A good agreement between the results of the equivalent model and the full-wave simulation would be see...

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Bibliographic Details
Main Authors: Huang, Li-Hsin, Cheng, Yu-Ying, Wu, Tzong-Lin
Format: Conference Proceeding
Language:English
Subjects:
Bandwidth
Bonding
high bandwidth memory (HBM)
hybrid bonding
Hybrid power systems
Power demand
PPA
Signal integrity (SI)
Solid modeling
Stacking
Three-dimensional displays
through-silicon via (TSV)
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Summary:In this paper, through-silicon via (TSV) circuit models for the third generation of high bandwidth memory (HBM3) are developed utilizing 3D IC stacking technology with micro-bump or hybrid bonding. A good agreement between the results of the equivalent model and the full-wave simulation would be seen. In addition, the power, performance, and area (PPA) metrics of both stacking techniques are analyzed and compared. In all aspects, the hybrid bonding technique is more effective.
ISSN:2165-4115
DOI:10.1109/EPEPS58208.2023.10314903