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Distributed computing for autonomous on board planning and sequence validation

We propose a new conceptual approach to system-level autonomy that exploits in a synergistic way recent breakthroughs in three specific areas: (1) Automatic generation of embeddable planning and validation software, where an existing activity plan generation tool (APGEN) is modified into an embeddab...

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Bibliographic Details
Main Authors: Maldague, P.F., Alkalai, L., Chau, S., Cheung, K.-M., Tong, D., Ko, A.Y.
Format: Conference Proceeding
Language:English
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Summary:We propose a new conceptual approach to system-level autonomy that exploits in a synergistic way recent breakthroughs in three specific areas: (1) Automatic generation of embeddable planning and validation software, where an existing activity plan generation tool (APGEN) is modified into an embeddable, lightweight version (APGEN-lite) that is suitable for insertion into the command and data handler (C&DH) subsystem of an autonomous spacecraft (S/C). APGEN-lite will generate and validate science opportunities activities in real time onboard the S/C. As a result, it will optimize the automatic delivery of science data to the ground, and dramatically reduce the operational costs. (2) Integration of telecommunications forecaster and planning tools, i.e. integration of a ground based telecom link analysis tool known as the telecommunications forecaster predictor (TFP) to the S/C environment by taking advantage of APGEN-lite, that will make use of advanced telecom technologies such as adaptive compression schemes. (3) Fault-tolerant assignment of computing tasks to multiple processors. Since it is responsible for its own planning and validation tasks, an autonomous S/C has much higher computing requirements than a conventional S/C. Therefore, the avionics architecture for autonomy has to be much more fault-tolerant than the traditional flight system design. The breakthrough that we exploit in our approach is a recently developed high-speed scalable fault tolerant distributed avionics architecture, which consists of two or more processors connected to multiple sensors, actuators, and science instruments by a high-speed, fault tolerant bus network.
DOI:10.1109/AERO.2002.1036831