High Mobility TMD NMOS and PMOS Transistors and GAA Architecture for Ultimate CMOS Scaling

• Main Authors: Penumatcha, A., O'Brien, K. P., Maxey, K., Mortelmans, W., Steinhardt, R., Dutta, S., Dorow, C. J., Naylor A., C. H., Kitamura, Kitamura, Zhong, T., Tronic, T., Buragohain, P., Rogan, C., Lin, C-C., Kavrik, M., Lux, J., Oni, A., Vyatskikh, A., Lee, S., Arefin, N., Fischer, P., Clenndenning, S., Radosavljevic, M., Metz, M., Avci, U.
• Format: Conference Proceeding
• Language: English
• Subjects: Doping; Gallium arsenide; Hafnium compounds; Logic gates; Resistance; Silicon; Transistors
• ISSN: 2156-017X
• DOI: 10.1109/IEDM45741.2023.10413662

Transition metal dichalcogenide [TMD] 2D channel materials offer a unique opportunity for scaled transistor gate lengths below 10 nm to enable ultra-scaled polypitch. The significant scaling advantage of 2D materials is due to their high mobility values at sub-1 nm thickness, which thus far are experimentally reported to be lower than predicted. In this work, we present high-mobility 2D TMD NMOS and PMOS transistors using M0S2 and WSe 2 . A high-temperature MOCVD growth process achieves a hole mobility of 50 cm 2 /Vs, with PMOS ON-current of 247 μA/pm. We also report high-mobility M0S 2 NMOS with mobilities up to 45 cm 2 /Vs, along with the first reported TMD PMOS Gate-All -Around [GAA] transistor with SSlin~107mV/dec. Finally, we compare critically today's 2D transistors to reference silicon transistors and discuss improvements needed to realize TMD's potential as a replacement for Front-End-Of-Line (FEOL) silicon.