Highly Manufacturable, Cost-Effective, and Monolithically Stackable 4F2 Single-Gated IGZO Vertical Channel Transistor (VCT) for sub-10nm DRAM

For the first time, we demonstrated experimentally 4F 2 single-gated IGZO-VCT, monolithically stacked on top of core/peripheral transistors without wafer bonding process for sub-10nm DRAM. Sufficiently low leakage current (I OFF ) of

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Bibliographic Details
Main Authors: Ha, Daewon, Lee, Wonsok, Cho, M.H., Terai, M., Yoo, S.-W., Kim, H., Lee, Y., Uhm, S., Ryu, M., Sung, C., Song, Y., Lee, K., Park, S.W., Lee, K.-S., Tak, Y.S., Hwang, E., Chae, J., Im, C., Byeon, S., Hong, M., Sim, K., Jung, W.J., Ryu, H., Hong, M.J., Park, S., Park, J., Choi, Y., Lee, S., Woo, G., Lee, J., Kim, D.S., Kuh, B.J., Shin, Yu Gyun, Song, Jaihyuk
Format: Conference Proceeding
Language:English
Subjects:
Ions
Leakage currents
Logic gates
Power demand
Random access memory
Transistors
Wafer bonding
Online Access:Request full text
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Summary:For the first time, we demonstrated experimentally 4F 2 single-gated IGZO-VCT, monolithically stacked on top of core/peripheral transistors without wafer bonding process for sub-10nm DRAM. Sufficiently low leakage current (I OFF ) of
ISSN:2156-017X
DOI:10.1109/IEDM45741.2023.10413772