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PCB Design for Reduced Thermal Drift for Current Measurements Through Shunt Resistors

This study was conducted from the necessity to measure electrical currents through shunt resistors as precisely as possible by minimizing thermal drift. The methods used to minimalize the thermal effects, placement of sensing lines, current lines and via instalment were analysed on 6 shunt resistors...

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Main Authors: Ursutiu, Toma, Chindris, Gabriel, Fizesan, Raul, Taut, Marius, Taut, Adrian
Format: Conference Proceeding
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creator Ursutiu, Toma
Chindris, Gabriel
Fizesan, Raul
Taut, Marius
Taut, Adrian
description This study was conducted from the necessity to measure electrical currents through shunt resistors as precisely as possible by minimizing thermal drift. The methods used to minimalize the thermal effects, placement of sensing lines, current lines and via instalment were analysed on 6 shunt resistors placed on a PCB which was coated with black paint to normalize the emissivity of the board. The results were measured and compared using a thermal camera, at an ambient temperature of 25, at a nominal current of 20A and a voltage provided from a power supply of 5V. The results show that the most effective layout for shunt resistors for reduced thermal drift is the one with sense lines at the middle of the pads and with no misalignment with respect to the current path.
doi_str_mv 10.1109/SIITME59799.2023.10430690
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fullrecord <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_10430690</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>10430690</ieee_id><sourcerecordid>10430690</sourcerecordid><originalsourceid>FETCH-LOGICAL-i119t-62c4b12e5d046486edbd639667bf1b9a1b7ffec6a3a4d9186ecb64492d040a63</originalsourceid><addsrcrecordid>eNo1kM1OwzAQhA0SElXpG3AwD5Cwa7ub-ghpgUqtQG04V06yaYL6g-zkwNtj8XOa0cynOYwQdwgpItj77XJZrBdTm1mbKlA6RTAayMKFmMRwpqegjYnopRgpMirJQNO1mITwAQBISDrDkXh_yx_lnEO3P8nm7OWG66HiWhYt-6M7yLnvmv6nyQfv-dTLNbsweD5GHyLmz8O-ldt2iNUm7oT-7MONuGrcIfDkT8eieFoU-Uuyen1e5g-rpEO0fUKqMiUqntZgyMyI67ImbYmyssHSOiyzpuGKnHamthiBqiRjrIo8ONJjcfs72zHz7tN3R-e_dv9H6G-vm1Nc</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>PCB Design for Reduced Thermal Drift for Current Measurements Through Shunt Resistors</title><source>IEEE Xplore All Conference Series</source><creator>Ursutiu, Toma ; Chindris, Gabriel ; Fizesan, Raul ; Taut, Marius ; Taut, Adrian</creator><creatorcontrib>Ursutiu, Toma ; Chindris, Gabriel ; Fizesan, Raul ; Taut, Marius ; Taut, Adrian</creatorcontrib><description>This study was conducted from the necessity to measure electrical currents through shunt resistors as precisely as possible by minimizing thermal drift. The methods used to minimalize the thermal effects, placement of sensing lines, current lines and via instalment were analysed on 6 shunt resistors placed on a PCB which was coated with black paint to normalize the emissivity of the board. The results were measured and compared using a thermal camera, at an ambient temperature of 25, at a nominal current of 20A and a voltage provided from a power supply of 5V. The results show that the most effective layout for shunt resistors for reduced thermal drift is the one with sense lines at the middle of the pads and with no misalignment with respect to the current path.</description><identifier>EISSN: 2642-7036</identifier><identifier>EISBN: 9798350344110</identifier><identifier>DOI: 10.1109/SIITME59799.2023.10430690</identifier><language>eng</language><publisher>IEEE</publisher><subject>Current measurement ; current measurement improved accuracy ; Measurement uncertainty ; optimal PCB layout ; Resistors ; Temperature measurement ; thermal drift of shunt resistors ; Thermal resistance ; Topology ; Voltage measurement</subject><ispartof>2023 IEEE 29th International Symposium for Design and Technology in Electronic Packaging (SIITME), 2023, p.308-311</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10430690$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27923,54553,54930</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/10430690$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ursutiu, Toma</creatorcontrib><creatorcontrib>Chindris, Gabriel</creatorcontrib><creatorcontrib>Fizesan, Raul</creatorcontrib><creatorcontrib>Taut, Marius</creatorcontrib><creatorcontrib>Taut, Adrian</creatorcontrib><title>PCB Design for Reduced Thermal Drift for Current Measurements Through Shunt Resistors</title><title>2023 IEEE 29th International Symposium for Design and Technology in Electronic Packaging (SIITME)</title><addtitle>SIITME</addtitle><description>This study was conducted from the necessity to measure electrical currents through shunt resistors as precisely as possible by minimizing thermal drift. The methods used to minimalize the thermal effects, placement of sensing lines, current lines and via instalment were analysed on 6 shunt resistors placed on a PCB which was coated with black paint to normalize the emissivity of the board. The results were measured and compared using a thermal camera, at an ambient temperature of 25, at a nominal current of 20A and a voltage provided from a power supply of 5V. The results show that the most effective layout for shunt resistors for reduced thermal drift is the one with sense lines at the middle of the pads and with no misalignment with respect to the current path.</description><subject>Current measurement</subject><subject>current measurement improved accuracy</subject><subject>Measurement uncertainty</subject><subject>optimal PCB layout</subject><subject>Resistors</subject><subject>Temperature measurement</subject><subject>thermal drift of shunt resistors</subject><subject>Thermal resistance</subject><subject>Topology</subject><subject>Voltage measurement</subject><issn>2642-7036</issn><isbn>9798350344110</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2023</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNo1kM1OwzAQhA0SElXpG3AwD5Cwa7ub-ghpgUqtQG04V06yaYL6g-zkwNtj8XOa0cynOYwQdwgpItj77XJZrBdTm1mbKlA6RTAayMKFmMRwpqegjYnopRgpMirJQNO1mITwAQBISDrDkXh_yx_lnEO3P8nm7OWG66HiWhYt-6M7yLnvmv6nyQfv-dTLNbsweD5GHyLmz8O-ldt2iNUm7oT-7MONuGrcIfDkT8eieFoU-Uuyen1e5g-rpEO0fUKqMiUqntZgyMyI67ImbYmyssHSOiyzpuGKnHamthiBqiRjrIo8ONJjcfs72zHz7tN3R-e_dv9H6G-vm1Nc</recordid><startdate>20231018</startdate><enddate>20231018</enddate><creator>Ursutiu, Toma</creator><creator>Chindris, Gabriel</creator><creator>Fizesan, Raul</creator><creator>Taut, Marius</creator><creator>Taut, Adrian</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>20231018</creationdate><title>PCB Design for Reduced Thermal Drift for Current Measurements Through Shunt Resistors</title><author>Ursutiu, Toma ; Chindris, Gabriel ; Fizesan, Raul ; Taut, Marius ; Taut, Adrian</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i119t-62c4b12e5d046486edbd639667bf1b9a1b7ffec6a3a4d9186ecb64492d040a63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2023</creationdate><topic>Current measurement</topic><topic>current measurement improved accuracy</topic><topic>Measurement uncertainty</topic><topic>optimal PCB layout</topic><topic>Resistors</topic><topic>Temperature measurement</topic><topic>thermal drift of shunt resistors</topic><topic>Thermal resistance</topic><topic>Topology</topic><topic>Voltage measurement</topic><toplevel>online_resources</toplevel><creatorcontrib>Ursutiu, Toma</creatorcontrib><creatorcontrib>Chindris, Gabriel</creatorcontrib><creatorcontrib>Fizesan, Raul</creatorcontrib><creatorcontrib>Taut, Marius</creatorcontrib><creatorcontrib>Taut, Adrian</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE/IET Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ursutiu, Toma</au><au>Chindris, Gabriel</au><au>Fizesan, Raul</au><au>Taut, Marius</au><au>Taut, Adrian</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>PCB Design for Reduced Thermal Drift for Current Measurements Through Shunt Resistors</atitle><btitle>2023 IEEE 29th International Symposium for Design and Technology in Electronic Packaging (SIITME)</btitle><stitle>SIITME</stitle><date>2023-10-18</date><risdate>2023</risdate><spage>308</spage><epage>311</epage><pages>308-311</pages><eissn>2642-7036</eissn><eisbn>9798350344110</eisbn><abstract>This study was conducted from the necessity to measure electrical currents through shunt resistors as precisely as possible by minimizing thermal drift. The methods used to minimalize the thermal effects, placement of sensing lines, current lines and via instalment were analysed on 6 shunt resistors placed on a PCB which was coated with black paint to normalize the emissivity of the board. The results were measured and compared using a thermal camera, at an ambient temperature of 25, at a nominal current of 20A and a voltage provided from a power supply of 5V. The results show that the most effective layout for shunt resistors for reduced thermal drift is the one with sense lines at the middle of the pads and with no misalignment with respect to the current path.</abstract><pub>IEEE</pub><doi>10.1109/SIITME59799.2023.10430690</doi><tpages>4</tpages></addata></record>
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ispartof 2023 IEEE 29th International Symposium for Design and Technology in Electronic Packaging (SIITME), 2023, p.308-311
issn 2642-7036
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source IEEE Xplore All Conference Series
subjects Current measurement
current measurement improved accuracy
Measurement uncertainty
optimal PCB layout
Resistors
Temperature measurement
thermal drift of shunt resistors
Thermal resistance
Topology
Voltage measurement
title PCB Design for Reduced Thermal Drift for Current Measurements Through Shunt Resistors
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T22%3A43%3A03IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=PCB%20Design%20for%20Reduced%20Thermal%20Drift%20for%20Current%20Measurements%20Through%20Shunt%20Resistors&rft.btitle=2023%20IEEE%2029th%20International%20Symposium%20for%20Design%20and%20Technology%20in%20Electronic%20Packaging%20(SIITME)&rft.au=Ursutiu,%20Toma&rft.date=2023-10-18&rft.spage=308&rft.epage=311&rft.pages=308-311&rft.eissn=2642-7036&rft_id=info:doi/10.1109/SIITME59799.2023.10430690&rft.eisbn=9798350344110&rft_dat=%3Cieee_CHZPO%3E10430690%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i119t-62c4b12e5d046486edbd639667bf1b9a1b7ffec6a3a4d9186ecb64492d040a63%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=10430690&rfr_iscdi=true