Interconversion of the functional block descriptions and their implementation in VHDL-AMS

• Main Authors: Mosin, S.G., Trofimov, M.A.
• Format: Conference Proceeding
• Language: English
• Subjects: Hardware design languages
• DOI: 10.1109/APEDE.2002.1044941

In this work the approach for automatic creation of functional block models is presented. The main methods of device description at functional level are considered and the possible ways of their interconversion are pointed. It is shown the possibility of presentation such descriptions in terms of the hardware description language VHDL-AMS targeted for analog and mixed-signal devices. The comparison of simulation results for models in VHDL-AMS and equivalent SPICE-model is presented.