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STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation
The unauthorized duplication of design intellectual property (IP) and illegal overproduction of integrated circuits (ICs) are hardware security threats plaguing the security of the globalized IC supply chain. Researchers have developed various countermeasures, such as logic locking, layout camouflag...
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Published in: | IEEE transactions on computer-aided design of integrated circuits and systems 2024-10, Vol.43 (10), p.2888-2901 |
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creator | Han, Zhaokun Dixit, Aneesh Patnaik, Satwik Rajendran, Jeyavijayan |
description | The unauthorized duplication of design intellectual property (IP) and illegal overproduction of integrated circuits (ICs) are hardware security threats plaguing the security of the globalized IC supply chain. Researchers have developed various countermeasures, such as logic locking, layout camouflaging, and split manufacturing, to overcome the security threat of IP piracy and unauthorized overproduction. Logic locking is a holistic solution among all countermeasures since it safeguards the design IP against untrusted entities, such as untrusted foundries, test facilities, or end-users, throughout the globalized IC supply chain. There are well-known logic locking techniques for combinational circuits with well-established security properties; however, their sequential counterparts remain vulnerable. Since most practical designs are inherently sequential, it is essential to develop secure obfuscation techniques to protect sequential designs. This article proposes a sequential obfuscation technique, STATION, building on the principles of finite state machine encoding schemes. STATION is resilient against various attacks on sequential obfuscation-input-output (I/O) query attacks and structural attacks, including the ones targeting sequential obfuscation-which have broken all state-of-the-art sequential obfuscation techniques. STATION achieves good resilience and desired security against various I/O and structural attacks, which we ascertain by launching 9 different attacks on all tested circuits. Moreover, STATION ensures tolerable overheads in power, performance, and area, such as 8.75%, 1.22%, and 5.63% on the largest tested circuit, containing 102 inputs, 7 outputs, {6.1\times 10^{4}} gates, 7 flip flops, 100 states, and {3.0\times 10^{3}} transitions. |
doi_str_mv | 10.1109/TCAD.2024.3387873 |
format | article |
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Researchers have developed various countermeasures, such as logic locking, layout camouflaging, and split manufacturing, to overcome the security threat of IP piracy and unauthorized overproduction. Logic locking is a holistic solution among all countermeasures since it safeguards the design IP against untrusted entities, such as untrusted foundries, test facilities, or end-users, throughout the globalized IC supply chain. There are well-known logic locking techniques for combinational circuits with well-established security properties; however, their sequential counterparts remain vulnerable. Since most practical designs are inherently sequential, it is essential to develop secure obfuscation techniques to protect sequential designs. This article proposes a sequential obfuscation technique, STATION, building on the principles of finite state machine encoding schemes. STATION is resilient against various attacks on sequential obfuscation-input-output (I/O) query attacks and structural attacks, including the ones targeting sequential obfuscation-which have broken all state-of-the-art sequential obfuscation techniques. STATION achieves good resilience and desired security against various I/O and structural attacks, which we ascertain by launching 9 different attacks on all tested circuits. Moreover, STATION ensures tolerable overheads in power, performance, and area, such as 8.75%, 1.22%, and 5.63% on the largest tested circuit, containing 102 inputs, 7 outputs, <inline-formula> <tex-math notation="LaTeX">{6.1\times 10^{4}} </tex-math></inline-formula> gates, 7 flip flops, 100 states, and <inline-formula> <tex-math notation="LaTeX">{3.0\times 10^{3}} </tex-math></inline-formula> transitions.]]></description><identifier>ISSN: 0278-0070</identifier><identifier>EISSN: 1937-4151</identifier><identifier>DOI: 10.1109/TCAD.2024.3387873</identifier><identifier>CODEN: ITCSDI</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuits ; Clocks ; Design automation ; Error analysis ; Finite state machine (FSM) ; FSM encoding ; Integrated circuits ; intellectual property (IP) protection ; logic locking ; Protection ; sequential obfuscation ; Supply chains</subject><ispartof>IEEE transactions on computer-aided design of integrated circuits and systems, 2024-10, Vol.43 (10), p.2888-2901</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><cites>FETCH-LOGICAL-c218t-57fb9f15780c0f87107ab3f55281cbc4de5724071fd773452952a3a86eb65bbf3</cites><orcidid>0000-0002-9450-1329 ; 0000-0002-8975-2414 ; 0000-0003-3687-3746 ; 0000-0002-2998-3800</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/10502250$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,27924,27925,54796</link.rule.ids></links><search><creatorcontrib>Han, Zhaokun</creatorcontrib><creatorcontrib>Dixit, Aneesh</creatorcontrib><creatorcontrib>Patnaik, Satwik</creatorcontrib><creatorcontrib>Rajendran, Jeyavijayan</creatorcontrib><title>STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation</title><title>IEEE transactions on computer-aided design of integrated circuits and systems</title><addtitle>TCAD</addtitle><description><![CDATA[The unauthorized duplication of design intellectual property (IP) and illegal overproduction of integrated circuits (ICs) are hardware security threats plaguing the security of the globalized IC supply chain. Researchers have developed various countermeasures, such as logic locking, layout camouflaging, and split manufacturing, to overcome the security threat of IP piracy and unauthorized overproduction. Logic locking is a holistic solution among all countermeasures since it safeguards the design IP against untrusted entities, such as untrusted foundries, test facilities, or end-users, throughout the globalized IC supply chain. There are well-known logic locking techniques for combinational circuits with well-established security properties; however, their sequential counterparts remain vulnerable. Since most practical designs are inherently sequential, it is essential to develop secure obfuscation techniques to protect sequential designs. This article proposes a sequential obfuscation technique, STATION, building on the principles of finite state machine encoding schemes. STATION is resilient against various attacks on sequential obfuscation-input-output (I/O) query attacks and structural attacks, including the ones targeting sequential obfuscation-which have broken all state-of-the-art sequential obfuscation techniques. STATION achieves good resilience and desired security against various I/O and structural attacks, which we ascertain by launching 9 different attacks on all tested circuits. Moreover, STATION ensures tolerable overheads in power, performance, and area, such as 8.75%, 1.22%, and 5.63% on the largest tested circuit, containing 102 inputs, 7 outputs, <inline-formula> <tex-math notation="LaTeX">{6.1\times 10^{4}} </tex-math></inline-formula> gates, 7 flip flops, 100 states, and <inline-formula> <tex-math notation="LaTeX">{3.0\times 10^{3}} </tex-math></inline-formula> transitions.]]></description><subject>Circuits</subject><subject>Clocks</subject><subject>Design automation</subject><subject>Error analysis</subject><subject>Finite state machine (FSM)</subject><subject>FSM encoding</subject><subject>Integrated circuits</subject><subject>intellectual property (IP) protection</subject><subject>logic locking</subject><subject>Protection</subject><subject>sequential obfuscation</subject><subject>Supply chains</subject><issn>0278-0070</issn><issn>1937-4151</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2024</creationdate><recordtype>article</recordtype><recordid>eNpNkEFOwzAURC0EEqVwACQWuYDL_3ZcO-xCCVCpohIN68h2bGQoCcTugtvTqF2wepuZ0egRco0wQ4Titl6UDzMGLJ9xrqSS_IRMsOCS5ijwlEyASUUBJJyTixg_ADAXrJiQalOX9XL9cpdtkk4uqzrbt6F7p_c6ujYrU9L2k766GLbBdSnbuJ_dnkFvs7Xxu2h1Cn13Sc683kZ3deSUvD1W9eKZrtZPy0W5opahSlRIbwqPQiqw4JVEkNpwLwRTaI3NWycky0Gib6Xk40HBNNdq7sxcGOP5lOBh1w59jIPzzfcQvvTw2yA0o4dm9NCMHpqjh33n5tAJzrl_eQGMCeB_ndlYdw</recordid><startdate>20241001</startdate><enddate>20241001</enddate><creator>Han, Zhaokun</creator><creator>Dixit, Aneesh</creator><creator>Patnaik, Satwik</creator><creator>Rajendran, Jeyavijayan</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><orcidid>https://orcid.org/0000-0002-9450-1329</orcidid><orcidid>https://orcid.org/0000-0002-8975-2414</orcidid><orcidid>https://orcid.org/0000-0003-3687-3746</orcidid><orcidid>https://orcid.org/0000-0002-2998-3800</orcidid></search><sort><creationdate>20241001</creationdate><title>STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation</title><author>Han, Zhaokun ; Dixit, Aneesh ; Patnaik, Satwik ; Rajendran, Jeyavijayan</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c218t-57fb9f15780c0f87107ab3f55281cbc4de5724071fd773452952a3a86eb65bbf3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2024</creationdate><topic>Circuits</topic><topic>Clocks</topic><topic>Design automation</topic><topic>Error analysis</topic><topic>Finite state machine (FSM)</topic><topic>FSM encoding</topic><topic>Integrated circuits</topic><topic>intellectual property (IP) protection</topic><topic>logic locking</topic><topic>Protection</topic><topic>sequential obfuscation</topic><topic>Supply chains</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Han, Zhaokun</creatorcontrib><creatorcontrib>Dixit, Aneesh</creatorcontrib><creatorcontrib>Patnaik, Satwik</creatorcontrib><creatorcontrib>Rajendran, Jeyavijayan</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE/IET Electronic Library</collection><collection>CrossRef</collection><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Han, Zhaokun</au><au>Dixit, Aneesh</au><au>Patnaik, Satwik</au><au>Rajendran, Jeyavijayan</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation</atitle><jtitle>IEEE transactions on computer-aided design of integrated circuits and systems</jtitle><stitle>TCAD</stitle><date>2024-10-01</date><risdate>2024</risdate><volume>43</volume><issue>10</issue><spage>2888</spage><epage>2901</epage><pages>2888-2901</pages><issn>0278-0070</issn><eissn>1937-4151</eissn><coden>ITCSDI</coden><abstract><![CDATA[The unauthorized duplication of design intellectual property (IP) and illegal overproduction of integrated circuits (ICs) are hardware security threats plaguing the security of the globalized IC supply chain. Researchers have developed various countermeasures, such as logic locking, layout camouflaging, and split manufacturing, to overcome the security threat of IP piracy and unauthorized overproduction. Logic locking is a holistic solution among all countermeasures since it safeguards the design IP against untrusted entities, such as untrusted foundries, test facilities, or end-users, throughout the globalized IC supply chain. There are well-known logic locking techniques for combinational circuits with well-established security properties; however, their sequential counterparts remain vulnerable. Since most practical designs are inherently sequential, it is essential to develop secure obfuscation techniques to protect sequential designs. This article proposes a sequential obfuscation technique, STATION, building on the principles of finite state machine encoding schemes. STATION is resilient against various attacks on sequential obfuscation-input-output (I/O) query attacks and structural attacks, including the ones targeting sequential obfuscation-which have broken all state-of-the-art sequential obfuscation techniques. STATION achieves good resilience and desired security against various I/O and structural attacks, which we ascertain by launching 9 different attacks on all tested circuits. Moreover, STATION ensures tolerable overheads in power, performance, and area, such as 8.75%, 1.22%, and 5.63% on the largest tested circuit, containing 102 inputs, 7 outputs, <inline-formula> <tex-math notation="LaTeX">{6.1\times 10^{4}} </tex-math></inline-formula> gates, 7 flip flops, 100 states, and <inline-formula> <tex-math notation="LaTeX">{3.0\times 10^{3}} </tex-math></inline-formula> transitions.]]></abstract><pub>IEEE</pub><doi>10.1109/TCAD.2024.3387873</doi><tpages>14</tpages><orcidid>https://orcid.org/0000-0002-9450-1329</orcidid><orcidid>https://orcid.org/0000-0002-8975-2414</orcidid><orcidid>https://orcid.org/0000-0003-3687-3746</orcidid><orcidid>https://orcid.org/0000-0002-2998-3800</orcidid></addata></record> |
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subjects | Circuits Clocks Design automation Error analysis Finite state machine (FSM) FSM encoding Integrated circuits intellectual property (IP) protection logic locking Protection sequential obfuscation Supply chains |
title | STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation |
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