AFT-CIM: An Energy Efficient ADC-Free Transpose Computing-in-Memory Macro for MAC Operations

• Main Authors: Wang, Shuai, Ma, Yuang, Kang, Yi
• Format: Conference Proceeding
• Language: English
• Subjects: ADC-free; Artificial intelligence; Backward; Common Information Model (computing); Computing-in-memory; Energy efficiency; Forward; In-memory computing; Online training; Random access memory; SRAM; Switches; Training; Transpose
• ISSN: 2158-1525
• DOI: 10.1109/ISCAS58744.2024.10558546

Computing-in-memory (CIM) based on SRAM is a promising technique to implement energy-efficient matrix computing in artificial intelligence (AI) edge devices. The ability to support both inference and training on a single macro is desired for AI edge devices, while most existing SRAM-based CIM macros only support inference. In this paper, we propose an energy-efficient and ADC-free transpose CIM (AFT-CIM) macro that can support both inference and training on a single macro. First, we introduce a computational circuit with switchable row or column inputs, which not only maintains input flexibility but also simplifies the circuits. Furthermore, we propose an orthogonal path adder tree (OPAT) that achieves flexible switching between two computation paths: row-wise accumulation and column-wise accumulation. The different combinations of input and accumulation directions enable different data computation paths on the proposed AFT-CIM macro. Different computations required in DNN training, such as matrix multiplication or transpose matrix multiplication, can be realized by flexibly controlling the data flow of the AFT-CIM macro. A 32Kb SRAM CIM macro is designed using 28 nm CMOS technology. The circuit-level evaluation shows that the power consumption of the OPAT circuit is reduced by 1.7× and the area overhead is reduced by 1.3× compared to the design using two separate adder trees. The peak energy efficiency of the CIM macro reaches 62.9 TOPS/W. Compared to SOTA transpose CIM macros, AFT-CIM shows 2.3× to 3.9× energy efficiency.