Design Automation for Charge Recovery Logic

This paper introduces a novel design automation methodology for charge recovery logic (CRL). The proposed methodology combines a novel logic compression algorithm with automatic schematic generation to automate the design process of CRL, enabling power and performance simulations for a large number...

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Bibliographic Details
Main Authors: Gonul, Yilmaz Ege, Filippini, Leo, Oh, Junghoon, Kuttappa, Ragh, Lerner, Scott, Kaneko, Mineo, Taskin, Baris
Format: Conference Proceeding
Language:English
Subjects:
Adiabatic Logic
Benchmark testing
Charge Recovery Logic
Circuits
Design automation
Design methodology
Electronic Design Automation
Integrated circuit modeling
Logic
Low-power
Semiconductor device modeling
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Summary:This paper introduces a novel design automation methodology for charge recovery logic (CRL). The proposed methodology combines a novel logic compression algorithm with automatic schematic generation to automate the design process of CRL, enabling power and performance simulations for a large number and variety of CRL circuits. As a measure of the effectiveness of the proposed design flow, automated implementations of CRL equivalents of the LGSynth'91 combinational benchmark circuits are compared with their CMOS counterparts. The results demonstrate a trade-off in power for area: Automatically generated CRL circuits dissipate 51.3% less power on average compared to CMOS equivalents, occupying 54.9% larger area.
ISSN:2158-1525
DOI:10.1109/ISCAS58744.2024.10558659