Novel Grid-Gate 16V-nLDMOS with a Low Specific On-Resistance of 4.7mΩ.mm2Based on A Standard 0.18μm BCD Platform

• Main Authors: Wang, Jiawei, Qiao, Ming, Ma, Dingxiang, Gao, Yue, Zhang, Bo
• Format: Conference Proceeding
• Language: English
• Subjects: BCD; Fabrication; grid-gate; LDMOS; MOSFET; Performance evaluation; Periodic structures; Power semiconductor devices; Semiconductor device measurement; specific on-resistance
• ISSN: 1946-0201
• DOI: 10.1109/ISPSD59661.2024.10579467

A novel 16V Lateral Double-diffused MOSFET (LDMOS) based on a standard 0.18 \mu\mathrm{m} BCD platform is reported in this work, which uses grid-gate technology to realize the 35V off-state breakdown voltage (\text{BV}_{\mathrm{O}\mathrm{F}\mathrm{F}}) with a reduction in the specific on-resistance (\mathrm{R}_{\mathrm{o}\mathrm{n},\mathrm{s}\mathrm{p}}) from 6.8\mathrm{m}\Omega\cdot \text{mm}^{2} to 5.9\mathrm{m}\Omega\cdot \text{mm}^{2} . By utilizing the single buffer structure and buffer RESURF composite structure, the proposed grid-gate 16V-nLDMOS is optimized to meet the requirements of 28V \text{BV}_{\mathrm{O}\mathrm{F}\mathrm{F}} and the measured \mathrm{R}_{\mathrm{o}\mathrm{n},\text{sp}} is reduced to 4.7\mathrm{m}\Omega\cdot \text{mm}^{2} . What's more, TLP experiments on the samples illustrated that the proposed buffer structures can extend the safe operation area (SOA) of grid-gate LDMOS to satisfy the need for DC-DC application.